Security IP Design Engineer

Arm Holdings

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Austin, TXSan Diego, CAChandler, AZ
Salary: $161,500–$218,500 / yr
Posted: 55 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $183k

This role $190k

$127k most similar roles pay here $230k

This role pays more than 58% of similar roles. Most pay $151,106–$215,759 — the shaded band above. At the midpoint, this role pays about $190k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 105 open roles on FindRole.

Listed pay typically runs $209,100–$282,900 across 105 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · Security IP Design Engineer

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The Security IP Design Engineer joins the Solutions Engineering Security IP Team to develop architectures, specifications, and sophisticated security hardware functions for pioneering SoC designs. This role involves developing RTL and constraints, performing bug fixes, leading design exploration, and managing optimization and structural checks. The engineer will collaborate with verification and implementation peers to drive closure, support debug, and achieve functional, power, and performance sign-off while mentoring team members on project roadmaps. Key technical requirements include expertise in Verilog RTL design, SystemVerilog, UVM/OVM, and scripting languages like Perl, Python, or TCL. The role focuses on the domain of SoC Security Solutions, specifically addressing Applied Cryptography, Key Management, Embedded Microprocessor Systems, Hardware Root of Trust, Secure Boot, and Access Control within complex environments involving multi-clock domains, AXI/AHB protocols, and power management techniques.

Skills

Verilog SystemVerilog UVM OVM SoC Design Applied Cryptography Secure Boot Key Management AXI AHB Python TCL Perl UPF CDC RDC LINT Timing Analysis Synthesis

What you'll do

Develop architectures, specifications, and sophisticated security hardware functions for SoC designs.
Create RTL and constraints for security IP and subsystems.
Perform design exploration, optimization, and structural checks to ensure performance.
Collaborate with verification and implementation teams to build test plans and achieve sign-off.
Fix bugs and resolve issues during the development of security features.
Improve internal processes and methodologies shared across the engineering team.
Mentor team members and provide technical guidance on project goals.
Manage project roadmaps, initiatives, and schedules in coordination with leadership.

What we're looking for

A Bachelor's or Graduate degree in Computer Science or Electrical/Computer Engineering (preferred).
Proven experience in Security Hardware, Embedded Processor Systems, Applied Cryptography, Secure Boot, Key Management, and Access Controls.
Advanced understanding of hardware Verilog RTL design, verification, and EDA methodologies.
Proven experience in SoC architecture including multi-clock domains, AXI/AHB protocols, multi-power domains, and reset architectures.
Competency with synthesis, timing analysis, constraints development, and ECO methodologies.
Familiarity with design checks such as CDC, RDC, X-Propagation, and LINT.
Familiarity with power management techniques, UPF, power estimation, and power optimization.
Experience with SystemVerilog and verification methodologies including UVM/OVM, Portable Stimulus, and Hardware/Firmware co-verification.

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