Graphics Power Analysis & Optimization Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $150,400–$277,600 / yr
Posted: 15 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Competitive pay

How this pay compares to similar roles

Similar $211k

This role $214k

$135k most similar roles pay here $293k

This role pays more than 62% of similar roles. Most pay $180,325–$241,750 — the shaded band above. At the midpoint, this role pays about $214k versus about $211k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics Power Analysis & Optimization Engineer

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As a Graphics Power Analysis & Optimization Engineer within the Silicon Technologies group, you will support power activity for high-performance GPU development. You will be responsible for creating early power estimations and targets, performing what-if analyses during architectural evaluation, and supporting RTL and gate-level power rollup and analysis. Your daily work involves analyzing various GPU workloads to identify reduction opportunities, implementing optimizations in both RTL and gates, and identifying sign-off tests to improve coverage. To succeed, you must possess expertise in low power microarchitecture, digital logic design principles, and the GPU pipeline. You will utilize Python for scripting and tools such as PowerArtist or PTPX to develop flows and heuristics for triaging large data sets. This role focuses on solving complex power efficiency challenges within high-performance system-on-chip designs.

Skills

Power Analysis RTL Python PowerArtist PTPX Micro-architecture Digital Logic Design Power Optimization Scripting Debugging

What you'll do

Create early power estimations and perform what-if analyses during the architectural evaluation stage.
Support RTL and gate-level power rollup and analysis for GPU designs.
Analyze various GPU workloads to identify specific opportunities for power reduction.
Evaluate and implement power optimizations in both RTL and gates.
Identify optimal power sign-off tests to improve overall power analysis coverage.
Develop flows and heuristics to accelerate power triage on large data sets.

What we're looking for

BS degree and minimum of 3+ years of relevant experience.
Experience with low power microarchitecture and implementation.
Experience with scripting in Python.
Experience with PowerArtist and/or PTPX.
Experience in writing, simulating and debugging RTL designs (preferred).
Knowledge of digital logic design principles including power and timing implications (preferred).
Knowledge in GPU pipeline (preferred).
Excellent communication skills, self-motivated and organized (preferred).