CPU Physical Design Engineer

The CPU Physical Design Engineer joins the Silicon Engineering Group to focus on block-level physical design for CPU components. In this role, you will drive RTL-to-GDS design convergence by utilizing logic synthesis and place-and-route tools to meet ambitious PPA goals. Your daily responsibilities include managing backend flow closures, meeting electrical requirements, improving silicon yield, and collaborating with CAD and methodology teams on tool optimizations. You will also partner with cross-functional teams to manage floorplanning, timing, power, reliability, and testability while working with custom IP teams to co-optimize memory macros and library standard cells. The role requires expertise in digital circuits and logic design, along with proficiency in Perl or TCL. You will apply high-frequency and low-power physical design techniques within deep sub-micron technology environments to solve complex integration challenges for CPU designs.