Graphics Power Analysis & Optimization Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
15 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $211k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 95% of similar roles. Most pay $180,325–$241,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $211k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics Power Analysis & Optimization Engineer

As a Graphics Power Analysis & Optimization Engineer within the Silicon Technologies group, you will support power activity for high-performance GPU development. You will be responsible for creating early power estimations and targets, performing what-if analyses during architectural evaluation, and supporting RTL and gate-level power rollup and analysis. Your daily work involves analyzing various GPU workloads to identify reduction opportunities, implementing optimizations in both RTL and gates, and identifying sign-off tests to improve coverage. To succeed, you must possess expertise in low power microarchitecture, implementation, and ASIC design techniques. You will utilize Python for scripting, along with tools like PowerArtist and PTPX. The role involves solving complex challenges related to power budgeting, projection, triage of large data sets, and post-silicon power correlation to ensure the development of power-efficient system-on-chip designs.

What you'll do

  • Create early power estimations, targets, and what-if analyses during the architectural evaluation stage.
  • Perform RTL and gate-level power rollup and analysis for GPU designs.
  • Analyze various GPU workloads to identify specific opportunities for power reduction.
  • Evaluate and implement power optimizations at both the RTL and gate levels.
  • Identify optimal power sign-off tests to improve the coverage of power analysis.
  • Develop flows and heuristics to accelerate power triage on large data sets.

What we're looking for

  • BS degree and minimum of 10+ years of relevant experience.
  • Experience with low power microarchitecture and implementation.
  • Experience with scripting in Python.
  • Experience with PowerArtist and/or PTPX.
  • Experience in product level power budgeting and projection (preferred).
  • Experience in writing, simulating and debugging RTL designs (preferred).
  • Experience in low power ASIC design and implementation techniques (preferred).
  • Experience in data mining applications to power modeling & triage (preferred).

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