Verification Engineer

Broadcom

Confirmed live 2 days ago High trust

Quick summary

Work type: On-site
Location: San Jose, CAFort Collins, CO
Salary: $121,900–$195,000 / yr
Posted: 60 days ago
Freshness: Confirmed live 2 days ago
Closes: Jan 9, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k

This role $158k

$110k most similar roles pay here $230k

This role pays less than 75% of similar roles. Most pay $159,562–$212,500 — the shaded band above. At the midpoint, this role pays about $158k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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At a glance

TL;DR · Verification Engineer

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As a Verification Engineer within the ASIC Product Division, you will develop and execute verification plans for IP blocks at both block and system levels. Your daily responsibilities include building and maintaining System Verilog and UVM-based verification environments and testbenches, developing Python-based behavioral models, and validating designs against RTL implementations. You will analyze simulation results, debug failures, drive root-cause resolutions, and develop automation scripts and regression frameworks while utilizing AI-assisted tools like ChatGPT or Gemini to enhance productivity. The role requires expertise in RTL verification methodologies, System Verilog, UVM/OVM, Python, C/C++, and scripting. You will collaborate with design and architecture teams to ensure quality for complex products including cloud computing AI engines, supercomputers, networking, and wireless solutions. This position focuses on solving technical challenges within the semiconductor and ASIC design flow.

Skills

System Verilog UVM OVM Python C C++ RTL Verification Scripting Firmware Formal Verification DSP PHY DDR Network Protocols AI-assisted tools Regression Frameworks

What you'll do

Develop and execute verification plans for IP blocks at both block and system levels.
Build and maintain System Verilog/UVM-based verification environments and testbenches.
Create Python-based behavioral models and validate designs against RTL implementations.
Analyze simulation results, debug failures, and drive root-cause resolution.
Develop and maintain automation scripts and regression frameworks.
Improve verification methodologies and flows to enhance design quality.
Utilize AI-assisted tools to increase productivity in the verification process.

What we're looking for

Bachelor's degree in Electrical Engineering, Electronic Engineering, or Computer Science.
8+ years of relevant industry experience.
Strong expertise in RTL verification methodologies and System Verilog.
Proficiency in UVM/OVM, Python, C/C++, and scripting.
Experience with ASIC verification flows and design verification methodologies.
Experience with block-level and system-level verification.
Strong debugging, problem-solving, and communication skills.
Familiarity with AI-assisted development tools to enhance productivity.