Staff Engineer, High-Speed I/O Analog-Mixed Circuit

Samsung Semiconductor

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
44 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $208k
$138k most similar roles pay here $265k

This role pays more than 69% of similar roles. Most pay $168,500–$216,250 — the shaded band above. At the midpoint, this role pays about $208k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 49 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 49 roles with salary data.

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At a glance

TL;DR · Staff Engineer, High-Speed I/O Analog-Mixed Circuit

Role Posting Log in to save

Staff Engineer, High-Speed I/O Analog-Mixed Circuit joins the Memory IO Lab to develop next-generation interface technology for machine learning, data analytics, and edge computing. This role involves hands-on analog circuit design, including high-speed data converters, PLL, and SERDES, while managing circuit and system specifications. The engineer will perform simulations using state-of-the-art CAD tools, guide layout floor-planning to optimize performance, and oversee layout activities for advanced CMOS technology nodes. Key responsibilities include designing high-frequency clock distribution, power design, and low-power designs involving DLL, FFE, CTLE, DFE, and ODT. Required expertise includes experience with DDR, LPDDR, GDDR, and HBM I/O interfaces. Technical proficiency is required in Cadence, MATLAB, EM tools, and scripting using Tcl or Perl to support silicon bring-up and automated measurement while balancing PPA trade-offs for high-speed circuits.

What does a Engineer earn in California?

Median $208000 from 94 postings across 22 companies.

See salary data

Skills

Analog Circuit Design Mixed-Signal Design SERDES PLL DDR LPDDR GDDR HBM CMOS Cadence MATLAB Simulink Tcl Perl Python EDA Tools Silicon Bring-up

What you'll do

  • Perform hands-on analog circuit design for high-speed data converters, PLLs, and SERDES.
  • Run simulations using state-of-the-art CAD tools to confirm functionality and performance.
  • Guide layout floor-planning and supervise layout activities to optimize overall performance.
  • Take ownership of circuit and system specifications.
  • Document all designs and simulation results for the project.
  • Collaborate with device and process teams to define transistor specifications.
  • Perform silicon bring-up and automated measurements using Tcl, Perl, or Python scripts.

What we're looking for

  • A BS in Electrical Engineering requires 10+ years of experience, an MS requires 8+ years, and a PhD requires 5+ years.
  • Candidates should have a degree in Computer Science as a preferred alternative to Electrical Engineering.
  • Requires 5+ years of experience in SoC architecture, high-speed serial interfaces, and analog/mixed-signal circuit designs using advanced CMOS nodes.
  • Must have prior experience designing standard high-speed interfaces such as DDR, LPDDR, GDDR, or HBM I/O.
  • Must be an expert in providing and understanding layout requirements for high-speed circuits.
  • Requires knowledge of high-speed I/O design components including PLL, DLL, FFE, CTLE, DFE, and power design.
  • Experience is required in high-frequency clock distribution design, implementation, and analysis.
  • Proficiency in EDA tools (Cadence, MATLAB, EM tools) and scripting languages like Tcl, Perl, or Python is required.

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