Logic Design Engineer

Amd

Confirmed live 2 days ago High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$166,400–$249,600 / yr
Posted
48 days ago
Freshness
Confirmed live 2 days ago
Closes
Jul 24, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $187k
This role $208k
$130k most similar roles pay here $262k

This role pays more than 64% of similar roles. Most pay $157,658–$216,250 — the shaded band above. At the midpoint, this role pays about $208k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Logic Design Engineer

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Logic Design Engineer will join the mixed-signal high-speed IO team to drive technical innovation and deliver high-quality technologies. The role involves analyzing complex digital design problems, proposing architecture and micro-architecture solutions, and creating microarchitecture specifications. Day-to-day responsibilities include developing Verilog RTL and Functional Behavioral Models, driving ASIC design flows and scripts, ensuring functional correctness with the verification team, and collaborating with physical design teams for timing closure. The engineer will also focus on power-saving enhancements and silicon bring-up diagnostics. Key technical requirements include experience in high-speed interfaces like DDR, GDDR, HBM, and SERDES, as well as behavior modeling for analog circuits. Proficiency is required in industry-standard ASIC CAD tools for simulation, synthesis, STA, CDC, UPF, and power estimation while managing designs with multiple power and clock domains.

Skills

Verilog RTL ASIC Design Mixed-Signal Design High-Speed SERDES DDR GDDR HBM STA CDC UPF Power Estimation Silicon Bring-up Microarchitecture Digital Design

What you'll do

  • Analyze complex digital design problems and propose architecture and micro-architecture solutions.
  • Develop Verilog RTL and Functional Behavioral Models.
  • Drive and develop ASIC design flows and scripts.
  • Create detailed microarchitecture specifications.
  • Collaborate with the Design Verification team to ensure functional correctness.
  • Coordinate with the Physical Design team to ensure implementation and timing closure.
  • Deliver improvements, optimizations, and power-saving enhancements for designs.
  • Support silicon bring-up and diagnostics processes.

What we're looking for

  • A BS or MS in electrical engineering or a related field is preferred.
  • Experience in analog mixed-signal design from specification to successful silicon is preferred.
  • Experience with high-speed interfaces such as DDR, GDDR, HBM, and high-speed SERDES is preferred.
  • Experience designing systems with multiple power domains and multiple clock domains is preferred.
  • Experience in behavior modeling for Analog Circuits is preferred.
  • Proficiency with industry-standard ASIC CAD tools for simulation, synthesis, STA, CDC, UPF, and power estimation is preferred.
  • Ability to develop Verilog RTL and Functional Behavioral Models.
  • Ability to analyze complex digital design problems and propose architecture or micro-architecture solutions.

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