Staff Engineer, DRAM

Samsung Semiconductor

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
10 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $205k
This role $208k
$152k most similar roles pay here $264k

This role pays more than 51% of similar roles. Most pay $175,000–$235,875 — the shaded band above. At the midpoint, this role pays about $208k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 49 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 49 roles with salary data.

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At a glance

TL;DR · Staff Engineer, DRAM

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Staff Engineer, DRAM joins the DRAM Design Lab within the Memory Business Unit to develop next-generation memory solutions, including High Bandwidth Memory. This role focuses on developing DRAM architecture, optimizing floorplans for mass production, and managing technical interactions with internal and external customers. Key responsibilities include designing Row and Column Bank architectures, implementing DFT methodologies, reducing power consumption, and performing performance analysis of new core designs. The candidate will collaborate with cross-functional teams to align designs with product roadmaps while ensuring reliability through full chip sim checks and power delivery network optimization. Required expertise includes memory design, proficiency in design software and statistical analysis tools, and experience with DDRx, GDDRx, LPDDRx, or HBMx interfaces. The role addresses critical technical challenges in architecture development, verification, logic synthesis, and timing analysis for advanced memory products.

What does a Engineer earn in California?

Median $208000 from 94 postings across 22 companies.

See salary data

Skills

DRAM HBM DDRx GDDRx LPDDRx ASIC Design RTL Logic Synthesis Timing Analysis DFT SERDES floor planning Power Delivery Network Statistical Analysis Verification

What you'll do

  • Develop and optimize DRAM architecture and floorplans for next-generation memory products.
  • Lead design specifications, performance analysis, and test planning for new hardware.
  • Design Row and Column Bank architectures along with associated test modes.
  • Develop methods to reduce power consumption in DRAM systems.
  • Analyze electrical data from silicon to validate new core design architecture performance.
  • Develop and implement DFT architectures and methodologies for product manufacturing.
  • Plan and optimize the power delivery network (PDN) floorplan.
  • Identify specific device requirements for advanced memory product designs.

What we're looking for

  • A Bachelor's degree with 10+ years of experience, a Master's with 8+ years, or a PhD with 5+ years in DRAM or related fields is preferred.
  • Candidates must possess required knowledge and skills in memory design.
  • Proficiency in design software and statistical analysis tools is required.
  • Expertise in DRAM product development including DDRx, GDDRx, LPDDRx, HBMx, etc., is preferred.
  • Experience with DRAM I/O interfaces and SERDES is preferred.
  • Proficiency in DRAM full chip functional verification is preferred.
  • A comprehensive understanding of ASIC design flow, including RTL design, verification, logic synthesis, and timing analysis, is preferred.

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