Staff SoC Clock & Power Management Validation Lead

Qualcomm

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Quick summary

Work type
On-site
Location
San Diego, CAAustin, TXFolsom, CAHillsboro, ORMarkham, Ontario, CanadaSanta Clara, CA
Salary
$145,600–$218,400 / yr
Posted
11 days ago
Freshness
Confirmed live today
Closes
Apr 14, 2027
Nearby
99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $208k
This role $182k
$132k $276k
below market most similar roles pay here above market

This role pays less than 65% of similar roles. Most pay $177,250–$238,787 — the blue band above. At the midpoint, this role pays about $182k versus about $208k for comparable roles.

Based on 240 similar postings.

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About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Staff SoC Clock & Power Management Validation Lead

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The SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform) joins the System Validation & Emulation team to lead end-to-end validation of clock, power, reset, and power-management architectures for next-generation AI accelerator platforms. This role involves driving pre-silicon and post-silicon validation of clocking infrastructure, PMIC integration, DVFS, and low-power features across multi-die AI systems. You will develop scalable device drivers, standalone tests, and automation frameworks while debugging complex power and performance issues. Key technical requirements include proficiency in C and Python, experience with lab instruments like oscilloscopes and logic analyzers, and knowledge of JTAG debug tools. You will solve stability and scalability problems for AI training and inference scenarios by collaborating with architecture, design, and firmware teams to ensure production-quality silicon.

Skills

SoC Validation C Python Perl Shell JTAG Verilog System Verilog FPGA Makefiles Cross-Compilers Oscilloscopes Logic Analyzers PMIC DVFS RTL Embedded Systems Pre-Silicon Validation Post-Silicon Validation

What you'll do

  • Lead end-to-end validation of clock, power, reset, and power-management architectures for AI accelerator platforms.
  • Develop scalable device drivers and standalone system tests using C.
  • Automate validation processes, execution, and inference using Python, Perl, and Shell.
  • Debug complex power, performance, and stability issues on pre-silicon and post-silicon platforms.
  • Create detailed test plans, validation strategies, and stress workloads for multi-die systems.
  • Use lab instruments like multimeters, oscilloscopes, and logic analyzers to perform hardware validation.
  • Review validation platform schematics to ensure adequate post-silicon debug support.

What we're looking for

  • Bachelor's degree in engineering (electronics, computer engineering, etc.) or related field.
  • 5+ years of relevant experience in SoC validation, software development, or embedded systems.
  • Prior work experience in clock and power validation.
  • Proficiency in C and Python.
  • Experience using lab instruments such as multimeters, oscilloscopes, and logic analyzers.
  • Exposure to debug tools like JTAG and knowledge of ARM-based SoC debug methodologies.
  • Experience with cross-compilers, linkers, makefiles, and understanding of SoC coherency and concurrency (preferred).
  • Knowledge of PMIC, rail power validation, FPGA-based emulation, or RTL/HDLs (preferred).

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