Senior SoC HW Analog/Functional Validation Engineer

What you'll do

• Own post-silicon validation for PLL, IO electrical/analog, or functional IO interfaces.
• Define and implement silicon debug tools and capabilities for custom SoC designs.
• Develop validation strategies, requirements, environments, and methodologies including debug board specifications.
• Write test plans and implement them by developing test content, scripts, and validation collateral.
• Execute post-silicon content and triage hardware failures to ensure high-quality results.
• Provide technical guidance, coaching, and mentorship to other engineers in specialized areas.
• Engage with partners to drive continuous improvement in design, validation plans, and methodologies.
• Apply expertise to pre-silicon verification plans, tests, and debug activities.

What we're looking for

• Must have a Doctorate with 1+ years experience, a Master's with 4+ years experience, or a Bachelor's with 5+ years experience in a relevant engineering field.
• Must be able to pass the Microsoft Cloud Background Check every two years.
• Must provide proof of citizenship or US residency to access export-controlled information.
• Must be able to meet government security screening requirements.
• Must have an applied understanding of Computer Architecture and SoC validation principles (preferred).
• Must be proficient in writing scripts or software using industry-standard languages like Python or C/C++ (preferred).
• Must have experience in verification, logic development, analog validation, or validation tools for CPU/SoC/IP development (preferred).
• Must have demonstrated validation expertise in electrical, power/performance, or automation/tools development (preferred).