SoC Power Validation Engineer

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $115,600–$173,400 / yr
Posted: 80 days ago
Freshness: Confirmed live yesterday
Closes: Dec 20, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $191k

This role $144k

$103k most similar roles pay here $233k

This role pays less than 85% of similar roles. Most pay $165,400–$216,250 — the shaded band above. At the midpoint, this role pays about $144k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · SoC Power Validation Engineer

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The SoC Power Validation Engineer joins the validation team within the Global SoC hardware organization to ensure silicon quality through post-silicon techniques. This role involves verifying CPU, GPU, DDR, and NOC power at core and system levels while performing pre-silicon and post-silicon thermal and performance correlation. The engineer will execute regression and PVT testing across various parts, analyze data to extract key metrics, and conduct Vmin/Fmax measurements for performance characterization. Day-to-day tasks include debugging low-level software and hardware issues using JTAG and kernel debuggers like Lauterbach Trace32, as well as automating validation flows with Python or C. The role requires expertise in digital design fundamentals, SoC power trees, and transistor power basics to solve complex problems related to mobile chip architecture and achieving low power consumption for high-performance chipsets.

Skills

Python C JTAG Lauterbach Trace32 Kernel Debuggers RTL Logic Analyzers Oscilloscopes Prompt Engineering Pre-Si Post-Si Vmin/Fmax Measurement

What you'll do

Perform pre-silicon and post-silicon power, thermal, and performance correlation across various SoC IPs.
Execute regression and PVT testing across different parts, lots, and wafers to extract key metrics.
Debug low-level software and hardware issues using JTAG and kernel debuggers.
Conduct Vmin/Fmax measurements to collect data for performance characterization.
Automate validation flows, data collection, and analysis using Python or other scripting languages.
Propose innovative solutions to optimize hardware and software for lower power consumption.
Document observations and analysis to identify gap areas in validation plans.

What we're looking for

Bachelor's degree in Computer Science, Electrical Engineering, or a related field.
Master's degree in Computer and/or Electrical Engineering is preferred.
PhD in Science, Engineering, or a related field is accepted as an alternative to a Bachelor's or Master's.
2+ years of experience in ASIC design, verification, validation, integration, or related work with a Bachelor's degree.
1+ year of experience in ASIC design, verification, validation, integration, or related work with a Master's degree.
Proficiency in Python and C for automation and scripting.
Experience using lab equipment like logic analyzers, oscilloscopes, JTAG, and kernel debuggers.
Understanding of mobile chip architecture, RTL, transistor power fundamentals, and silicon parametric testing.

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