SoC Power Validation Engineer

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$115,600–$173,400 / yr
Posted
5 days ago
Closes
Dec 20, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $191k
This role $144k
$103k most similar roles pay here $234k

This role pays less than 90% of similar roles. Most pay $165,200–$216,250 — the shaded band above. At the midpoint, this role pays about $144k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 828 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 508 roles with salary data.

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At a glance

TL;DR · SoC Power Validation Engineer

Join Qualcomm Technologies as a Power Validation Engineer within the Global SoC hardware organization's validation team, where you will ensure silicon quality through post-silicon validation of CPU/GPU/DDR/NOC power at both core and system levels. Your daily tasks include performing pre-si and post-si power, thermal, and performance correlation across various IPs, executing regression testing, analyzing data to extract key metrics, and collaborating with architects and designers to define comprehensive validation plans. You will also automate validation flows using Python or similar scripting languages, debug low-level software and hardware issues, and document findings to propose innovative solutions for optimizing chipset power consumption. Ideal candidates possess a strong background in digital design fundamentals, SoC architecture, and experience with tools like JTAG and kernel debuggers, along with proficiency in C and Python programming.

What you'll do

  • Perform pre-silicon and post-silicon power, thermal, and performance analysis across various SoC IPs.
  • Execute regression testing and PVT analysis to extract key metrics for validation.
  • Define and execute comprehensive validation plans with cross-functional teams.
  • Document observations and propose innovative solutions for low-power optimization.
  • Debug software and hardware issues using JTAG and kernel debuggers.
  • Conduct Vmin/Fmax measurements for performance characterization of SoCs.
  • Automate data collection and analysis processes using Python scripting.

What we're looking for

  • Extensive experience with post-silicon validation techniques for CPU/GPU/DDR/NOC power.
  • Deep understanding of SoC system architecture and low-power design methodologies.
  • Proficiency in Python or similar scripting languages for automation and data analysis.
  • Ability to execute regression testing across various PVT conditions and analyze results.
  • Strong collaboration skills with architects, designers, verification engineers, and software teams.
  • Expertise in using debug tools like JTAG and kernel debuggers for low-level debugging.
  • Excellent analytical and multitasking abilities in a dynamic team environment.

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