System Validation Lead, Staff (AI Accelerator Platform)

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Diego, CAAustin, TX
Salary
$145,600–$218,400 / yr
Posted
11 days ago
Freshness
Confirmed live yesterday
Closes
Apr 14, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $208k
This role $182k
$133k $266k
below market most similar roles pay here above market

This role pays less than 64% of similar roles. Most pay $174,258–$241,750 — the blue band above. At the midpoint, this role pays about $182k versus about $208k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · System Validation Lead, Staff (AI Accelerator Platform)

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The System Validation Lead, Staff (AI Accelerator Platform) joins the System Validation & Emulation team to ensure end-to-end silicon quality for next-generation AI accelerator platforms. This role involves driving validation strategy, test planning, and content development across emulation and silicon phases. You will develop and maintain bare-metal software, including low-level hardware interfaces, register and interrupt programming, and clock and power management. Key responsibilities include debugging System-On-Chip with limited visibility using development boards and lab equipment, and implementing algorithms for performance and power efficiency. Required skills include proficiency in C, Assembly, and scripting languages like Python or Linux shell. You must possess deep knowledge of operating systems, caching, virtual memory, and RTL code such as Verilog or VHDL to solve complex system-level concurrency problems.

Skills

SoC Validation Bare-metal Software C Assembly Python Linux Shell Verilog VHDL FPGA Emulation Pre-silicon Validation Machine Learning Interrupt Programming Clock and Power Management

What you'll do

  • Define and optimize validation tests for multi-processor systems focusing on system-level concurrency.
  • Develop and maintain bare-metal software including low-level hardware interfaces, registers, interrupts, and power management.
  • Debug and troubleshoot System-on-Chip issues using development boards and lab equipment with limited visibility.
  • Implement and optimize algorithms for performance, power efficiency, and memory footprint.
  • Support pre-silicon validation efforts using simulation, emulation, and FPGAs.
  • Conduct post-silicon bring-up, system integration, and validation of system-level use cases.
  • Drive validation strategy and test planning for next-generation AI accelerator platforms.

What we're looking for

  • BS in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, or integration experience.
  • MS in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, or integration experience.
  • PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, or integration experience.
  • 8+ years of experience in silicon validation or platform bring-up.
  • Experience programming in C and Assembly language.
  • Experience with bare-metal software development and low-level hardware interfaces.
  • Strong understanding of operating systems concepts, caching, virtual memory, and embedded software fundamentals.
  • Experience with scripting languages such as Python or Linux shell.
  • Experience with developing and applying machine learning models for system validation (preferred).
  • Familiarity in reading and understanding RTL code such as Verilog or VHDL (preferred).

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