Senior Physical Design Engineer

Microsoft

Confirmed live yesterday Low trust

Quick summary

Work type
On-site
Location
Salary
$119,800–$234,700 / yr
Posted
43 days ago
Freshness
Confirmed live yesterday
Closes
Jan 26, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $182k
This role $177k
$106k most similar roles pay here $248k

This role pays more than 56% of similar roles. Most pay $155,675–$208,200 — the shaded band above. At the midpoint, this role pays about $177k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 598 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 586 roles with salary data.

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At a glance

TL;DR · Senior Physical Design Engineer

The Senior Physical Design Engineer joins the Compute Silicon & Manufacturing Engineering team to support the development of high-performance computer chips like Azure Cobalt. This role involves driving end-to-end execution from synthesis through place-and-route for large designs, ensuring completion of all signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification. The engineer is responsible for SOC clocks, high-speed clock construction, and CTS while exploring methodologies to optimize SOC blocks. Key responsibilities include RTL to GDS implementation and influencing design tools and flows through a data-driven approach. The role requires expertise in floorplanning, extraction, and power, performance, and area trade-offs. Candidates must navigate complex technical domains involving advanced foundry process nodes and low-power design methodologies to solve critical infrastructure challenges for cloud hardware systems.

What you'll do

  • Execute end-to-end physical design from synthesis through place-and-route for large designs.
  • Manage all signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification.
  • Drive high-speed clock construction and manage SOC clocks.
  • Explore and implement methodologies to optimize SOC blocks for clock construction.
  • Implement RTL to GDS transitions within the Physical Design domain.
  • Influence design tools, flows, and methodologies using a data-driven approach.
  • Partner with CAD and methodology teams to identify and resolve technical flow issues.

What we're looking for

  • A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 5+ years of technical engineering experience.
  • A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 4+ years of technical engineering experience.
  • A Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 1+ year of technical engineering experience.
  • Ability to pass the Microsoft Cloud Background Check and meet government security screening requirements.
  • Proof of citizenship, residency, or other protected status for access to export-controlled information.
  • Experience in physical design including synthesis, floorplanning, place and route, timing, and physical verification.
  • Expertise in SoC clock construction, high-speed designs, and low-power design methodology.
  • Experience with production silicon tape-outs in advanced foundry process nodes.

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