Senior ASIC Design Engineer

HP Inc.

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Vancouver, WA
Salary
$116,150–$182,400 / yr
Posted
90 days ago
Freshness
Confirmed live today
Closes
Jan 25, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $149k
$103k $235k
below market most similar roles pay here above market

This role pays less than 90% of similar roles. Most pay $167,737–$216,250 — the blue band above. At the midpoint, this role pays about $149k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About HP Inc.

HP Inc. is a global technology company that develops and sells personal computers, printers, and related supplies and services. Its products include laptops, desktops, workstations, and printing solutions for consumers and businesses worldwide.

HP Inc. currently has 115 open roles on FindRole.

Listed pay typically runs $130,700–$205,200 across 95 roles with salary data.

Most-posted roles

View all roles at HP Inc.

At a glance

TL;DR · Senior ASIC Design Engineer

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The Senior ASIC Design Engineer joins the R&D digital Application-Specific Integrated Circuit design team to develop main controllers for HP printers. This role involves leading functional blocks and subsystems from design through silicon verification, including RTL coding, silicon validation, and qualification. You will collaborate with internal and external partners to align on specifications, drive design methodology, and automate tools. Key responsibilities include contributing to Inkjet and Laserjet print architecture, data path requirements, and prototyping ASIC designs in FPGA or software models. Required skills include deep knowledge of submicron semiconductor technology, embedded system design, and the full digital ASIC/SOC design flow. You must be proficient in Verilog, SV, Python, Perl, C, and C++, while utilizing Synopsys and Cadence EDA tools for simulation, synthesis, and timing analysis.

What does a ASIC Design Engineer earn?

Median $200450 from 52 postings across 8 companies.

See salary data

Skills

ASIC Design SOC Design RTL Coding Verilog Python C C++ Perl Synopsys Cadence Assertion based verification Git Subversion FPGA ARM DDR Flash eMMC VLSI

What you'll do

  • Lead functional blocks and subsystems of digital ASICs from design through silicon verification.
  • Perform RTL coding, verification, silicon validation, and qualification for ASIC designs.
  • Lead cross-discipline task forces to triage and resolve hardware and firmware integration issues.
  • Contribute to the development of Inkjet and Laserjet print architecture and data path requirements.
  • Co-develop ASIC prototypes in FPGA or software models to support pre-silicon firmware development.
  • Drive design methodology improvements and tool automation work as needed.
  • Align with partners on technical specifications, drive design reviews, and complete documentation.

What we're looking for

  • BS or MS degree in electrical engineering or equivalent with a focus on VLSI design.
  • 8-10 years of ASIC or SOC design and development experience.
  • Deep knowledge of submicron semiconductor technology and embedded system design, verification, and product development lifecycles.
  • Familiarity with digital ASIC/SOC design flow from RTL to silicon characterization.
  • Familiarity with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing, and verification.
  • Familiarity with Verilog, SV, Python, Perl, C, and C++ programming languages.
  • Familiarity with code base management methods including subversion, git, and GitHub.
  • Knowledge of Laserjet technology, ARM microprocessors, or memory subsystems (preferred).

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