Senior ASIC Design Engineer

Nvidia

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
4 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $194k
This role $177k
$125k most similar roles pay here $241k

This role pays less than 55% of similar roles. Most pay $172,000–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 909 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 893 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior ASIC Design Engineer

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As a Senior ASIC Design Engineer, you will join a global team to design and implement high-performance, area-efficient, and power-efficient RTL for leading SoCs and GPUs. Your daily responsibilities involve crafting architecture and micro-architecture, performing RTL design and synthesis, and conducting logic and timing verification using advanced CAD tools and semiconductor process technologies. You will also develop design properties for formal verification and collaborate with multiple development teams to meet build requirements. The role requires expertise in Verilog, SystemVerilog, Perl, Python, and C/C++. You must possess skills in logic synthesis, timing analysis, and experience with simulation tools like VCS and debug tools like Debussy and GDB. This position focuses on the technical challenge of developing high-speed energy-efficient data paths for products ranging from consumer graphics to self-driving cars and artificial intelligence.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 8 companies.

See salary data

Skills

Verilog System Verilog RTL Design Logic Synthesis Timing Analysis Python C/C++ Perl VCS GDB Debussy Formal Verification Assertion-based Verification VLSI Computer Architecture Simulation Tools

What you'll do

  • Design and implement high-performance, area-efficient RTL to meet specific design goals and requirements.
  • Craft architecture and micro-architecture for advanced SoCs and GPUs.
  • Perform logic and timing verification using advanced CAD tools and semiconductor process technologies.
  • Conduct RTL design and synthesis processes.
  • Develop design properties and assumptions for formal verification methodologies.
  • Verify builds through sophisticated verification methods including unit and system-level testing.
  • Debug hardware designs using specialized tools like VCS, Debussy, and GDB.

What we're looking for

  • Bachelor's degree or equivalent experience in a relevant field.
  • Master's degree or equivalent experience in a relevant field.
  • 5+ years of experience in hardware engineering with a focus on VLSI and Computer Architecture.
  • Expertise in Verilog, SystemVerilog, or similar HDL.
  • Proficiency in programming languages such as Perl/Python and C/C++.
  • Solid experience with logic synthesis and timing analysis.
  • Knowledge of high-speed energy-efficient data paths (preferred).
  • Familiarity with build and verification tools including VCS, Debussy, and GDB.

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