R&D IC Design Engineer

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Irvine, CASan Jose, CA
Employment
Full-time
Posted
60 days ago
Freshness
Confirmed live yesterday
Closes
Feb 20, 2027

Market check

Salary context

How this pay compares to similar roles

Similar $195k
$139k $256k
below market most similar roles pay here above market

This listing doesn't post a salary. Most similar roles pay $162,000–$227,500.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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At a glance

TL;DR · R&D IC Design Engineer

The R&D IC Design Engineer joins the team to work on chip design for 10Gbps to 400Gbps backplane, cable, and optical fiber communications. The role involves translating marketing and system requirements into block level design specifications, preparing detailed design documents, and performing HDL coding. Daily responsibilities include equivalency checking, STA result review, CDC checks, Lint checks, and RTL or gate level simulations. The engineer will also handle silicon debugging scripting, resource requirement planning, and design tradeoff analysis for leakage, dynamic power, and die size. Required skills include Verilog, VHDL, Unix/Perl Scripting, Python, and C. Candidates must possess knowledge of ARM subsystems, high speed digital circuit design, 10G/100G Ethernet, OTN networks, and digital signal processing for ASIC development.

What you'll do

  • Translate marketing and system requirements into detailed block-level design specifications.
  • Write HDL code and prepare timing constraint files for chip design.
  • Perform RTL and gate-level simulations, equivalency checking, and Lint checks.
  • Conduct Static Timing Analysis (STA) result reviews and CDC checks.
  • Develop scripts for silicon debugging, test benches, and synthesis tasks.
  • Perform design tradeoff analyses for leakage, dynamic power, and die size.
  • Generate verification and test plans for design validation.
  • Execute silicon bring-up and volume production qualification procedures.

What we're looking for

  • B.S. degree in EE or Computer Engineering with at least 12 years of related work experience.
  • M.S. degree or Ph.D. in EE or Computer Engineering with at least 10 years of related work experience.
  • Good knowledge of ARM subsystems and high-speed digital circuit design.
  • Good knowledge of 10G/100G Ethernet, OTN networks, and RTL simulation and synthesis.
  • Good knowledge of Verilog, VHDL, Unix/Perl Scripting or Python, and C.
  • In-depth knowledge of design for low power, design for test, and design for manufacturing.
  • Good knowledge of digital signal processing and error correction code (preferred).
  • Experience with High-level Synthesis in design and verification (preferred).

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