Principal Quantum Design Verification Engineer

What you'll do

• Own verification environments and tests for IP and SoC designs using RTL and netlists.
• Define pre-silicon simulation plans and post-silicon validation/characterization plans for SoC and IP blocks.
• Coordinate contingent staff and external vendors to deliver high-quality design deliverables on schedule.
• Create test plans for digital and analog components, including the development of AMS simulation models.
• Manage databases, bug-tracking systems, and milestone reports for SoC and IP repositories.
• Collaborate with DFT teams to test and verify specific design features.
• Align verification methodologies with wider teams to drive continuous process improvement for at-scale execution.

What we're looking for

• Doctorate in Physics, Engineering, or related field and 3+ years of industry or R&D experience.
• Master's Degree in Physics, Engineering, or related field and 6+ years of industry or R&D experience.
• Bachelor's Degree in Physics, Engineering, or related field and 8+ years of industry or R&D experience.
• Ability to meet Microsoft, customer, and government security screening requirements, including a Microsoft Cloud Background Check.
• Ability to provide proof of citizenship or U.S. permanent residency for export-controlled information access.
• Ability to leverage AI tools to drive innovation and work in an AI-first hardware development environment.
• 10+ years of design verification experience for complex SoC or large IP blocks (preferred).
• 5+ years of experience coordinating verification across large SoC or IP programs (preferred).
• Hands-on expertise with UVM, OVM, and SystemVerilog (preferred).
• Experience with Analog Mixed-Signal (AMS) verification and simulation (preferred).
• Proficiency in MATLAB and scripting languages like Python, Ruby, or Perl (preferred).
• Experience writing tests in C and C++ (preferred).
• Background verifying complex chips like CPUs, GPUs, AI accelerators, or networking SoCs (preferred).