Senior Quantum Design Verification Engineer

What you'll do

• Create verification environments and test plans for IP and SoC level designs.
• Validate designs in simulation using both pre- and post-layout RTL and netlists.
• Manage bug-tracking systems and coordinate milestone reviews and status reporting.
• Perform Analog Mixed Signal Simulation models and verify digital and analog components.
• Coordinate with Design for Test teams to validate specific DFT features.
• Drive the continuous improvement of design verification processes for large-scale execution.
• Automate simulation and data analysis environments using scripting languages like Python or MATLAB.

What we're looking for

• A Doctorate in Physics or Engineering with 1+ years of R&D experience, a Master's with 4+ years, or a Bachelor's with 6+ years.
• Ability to pass Microsoft Cloud Background Checks and meet export control regulations (ITAR/EAR).
• Proof of citizenship or U.S. permanent residency is required for access to export-controlled information.
• Experience in design verification for complex SoC IPs and systems.
• Expertise in verification principles, testbenches, stimulus generation, and creating simulation environments.
• Proficiency in scripting languages such as Python, Ruby, or Perl.
• Ability to write tests in C and C++.
• Master's Degree in Physics, Engineering, or related field AND 4+ years.