Principal Design Verification Engineer (Silicon Engineering)

SpaceX

Quick summary

Work type: On-site
Location: Irvine, CA
Salary: $210,000–$300,000 / yr
Posted: today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $190k

This role $255k

$135k most similar roles pay here $318k

This role pays more than 93% of similar roles. Most pay $164,600–$216,250 — the shaded band above. At the midpoint, this role pays about $255k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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View all roles at SpaceX

At a glance

TL;DR · Principal Design Verification Engineer (Silicon Engineering)

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The Principal Design Verification Engineer role at Silicon Engineering in Irvine, CA, involves leading and executing verification test plans for digital ASIC and FPGA designs at both block and system levels. This senior-level position requires expertise in developing comprehensive verification strategies and automating processes using Python. The ideal candidate will work on complex projects, ensuring thorough testing and validation to meet stringent quality standards. Experience with large-scale semiconductor design and a deep understanding of verification methodologies are essential. Candidates should be proficient in digital design verification tools and possess strong problem-solving skills to address intricate technical challenges in the high-tech industry.

Skills

Python ASIC verification FPGA verification

What you'll do

Lead and execute verification test plans for digital ASIC and FPGA designs.
Develop and manage verification milestones from initiation to completion.
Conduct block-level and system-level verification of digital circuits.
Utilize Python for automation in the verification process.
Ensure compliance with U.S. Department of State ITAR requirements.

What we're looking for

Responsible for digital ASIC and FPGA verification at block and system level
Lead and execute verification test plans, development, and milestones
Proficient in Python for automation tasks
Experience with verification methodologies and tools
Strong understanding of U.S. Department of State ITAR requirements

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