Principal Design Verification Engineer (Silicon Engineering)

SpaceX

Quick summary

Work type: On-site
Location: Redmond, WA
Salary: $210,000–$300,000 / yr
Posted: today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $190k

This role $255k

$135k most similar roles pay here $318k

This role pays more than 93% of similar roles. Most pay $164,600–$216,250 — the shaded band above. At the midpoint, this role pays about $255k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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View all roles at SpaceX

At a glance

TL;DR · Principal Design Verification Engineer (Silicon Engineering)

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The Principal Design Verification Engineer role within the Silicon Engineering team requires an experienced professional to lead and execute digital ASIC and FPGA verification at both block and system levels. This individual will develop and manage comprehensive verification test plans, ensuring all milestones are met from inception through completion. The ideal candidate should possess strong Python skills for automation and be adept at working with leading-edge technologies in a high-scale environment. Familiarity with ITAR requirements is essential due to the nature of the work involving U.S. Department of State regulations.

Skills

Python CI/CD

What you'll do

Lead and execute verification test plans for digital ASIC and FPGA projects.
Develop and manage verification milestones from project inception to completion.
Conduct block-level and system-level verification of digital circuits.
Write automation scripts using Python to enhance verification processes.
Ensure verification coverage meets project requirements and industry standards.

What we're looking for

Responsible for digital ASIC and FPGA verification at block and system level
Lead and execute verification test plan, development, and milestones
Strong Python skills for automation in verification processes
Extensive experience in design verification engineering
ITAR compliance required for U.S. Department of State regulations

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