Electrical Packaging Design Engineer

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CASan Diego, CA
Salary
$200,000–$300,000 / yr
Posted
84 days ago
Freshness
Confirmed live today
Closes
Aug 3, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $181k
This role $250k
$120k $319k
below market most similar roles pay here above market

This role pays more than 89% of similar roles. Most pay $147,500–$214,250 — the blue band above. At the midpoint, this role pays about $250k versus about $181k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Electrical Packaging Design Engineer

The Electrical Packaging Design Engineer joins the AECG - Embedded Team to build and optimize platforms for embedded and commercial applications. This role involves defining cost-effective, high-performance solutions for multiple FPGA device package families by translating electrical requirements into manufacturable package technology. Key responsibilities include using Cadence tools for design, modeling, and simulations, conducting routing and stack-up studies, and performing Power Integrity analysis for core and IO. The engineer will develop multi-signal package models over 50 GHz bandwidth, collaborate with PCB Layout Engineers on ballmaps, and create scripts to maintain electrical design guidelines. Required skills include proficiency in Cadence package design tools, 2D/3D modeling software like Ansys or AutoCAD, and knowledge of Organic/PCB technologies, SerDes design, and DFM/DFR principles.

What you'll do

  • Use Cadence tools to perform design, modeling, and simulations to achieve timely design sign-off.
  • Define package and module design requirements, including technology and stack-up, during project conception.
  • Conduct routing, stack-up, and component placement studies for various device packaging.
  • Develop multi-signal package models over 50 GHz bandwidth and create suitable test structures.
  • Perform Power Integrity analysis for core and IO to generate power delivery network requirements.
  • Develop scripts to check package parameters and maintain a database of electrical design guidelines.
  • Optimize package ballmaps and die sizes in coordination with PCB Layout and chip teams.

What we're looking for

  • Bachelor’s or Master's degree in Engineering.
  • Experience in package or PCB layout.
  • Current working knowledge of Cadence package design tools.
  • Experience in high power and Gbs IO products (preferred).
  • Working knowledge of 2D/3D package design and modeling tools such as Ansys or AutoCAD (preferred).
  • Knowledge of SKILL (preferred).
  • Knowledge of DoE, DFM/DFR (preferred).
  • Good knowledge of SerDes design and package/PCB layout constraints (preferred).

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