Package Design Engineer

Broadcom

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Jose, CAAustin, TXFort Collins, CO
Salary
$141,300–$226,000 / yr
Posted
102 days ago
Freshness
Confirmed live yesterday
Closes
Nov 26, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $173k
This role $184k
$123k most similar roles pay here $237k

This role pays more than 62% of similar roles. Most pay $146,500–$199,199 — the shaded band above. At the midpoint, this role pays about $184k versus about $173k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · Package Design Engineer

As a Package Design Engineer, you will join a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. You will hold overall design responsibility for complex flip-chip-BGA packages, focusing on critical structures for SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Your daily work involves managing multiple projects simultaneously while addressing signal integrity, power integrity, manufacturability, reliability, and thermal requirements. You will perform physical design layout and contribute to team efficiency through process development and automation. The role requires expertise in flip-chip BGA package design and experience with Cadence APD or similar tools. Preferred candidates possess skills in Cadence SKILL for Allegro or other design-automation coding to solve complex high-speed and high-power delivery challenges.

What you'll do

  • Lead the overall design of ASIC packages focusing on signal integrity, power integrity, manufacturability, reliability, and thermal performance.
  • Design critical package structures for high-speed components including SerDes, ADC/DAC, DDR, and HBM.
  • Perform physical layout design as a foundational component of the engineering process.
  • Manage project timelines, priorities, and tracking across multiple simultaneous projects.
  • Act as the primary point of contact for customer interface regarding assigned design projects.
  • Drive team efficiency through process development, automation, and technical documentation.
  • Coordinate with internal teams and external vendors to execute co-design requirements.

What we're looking for

  • BSEE or similar degree with 12+ years of experience in flip-chip-BGA package design.
  • MSEE or similar degree with 10+ years of work experience.
  • Experience designing complex flip-chip-BGA packages for high-speed SerDes and high-power delivery.
  • Knowledge of package-level signal integrity and power integrity.
  • Proficiency in physical design (layout).
  • Preferred experience with Cadence APD or an equivalent tool.
  • Preferred 1 or more years of experience with Cadence SKILL or similar design-automation coding.
  • Ability to manage multiple projects simultaneously while collaborating with a worldwide team.

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