Package Design Engineer

Broadcom

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $141,300–$226,000 / yr
Posted: 5 days ago
Closes: Nov 26, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $166k

This role $184k

$119k most similar roles pay here $237k

This role pays more than 68% of similar roles. Most pay $137,500–$195,442 — the shaded band above. At the midpoint, this role pays about $184k versus about $166k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 105 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 103 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · Package Design Engineer

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Broadcom seeks an experienced IC package-design engineer to join its global R&D team focused on high-performance ASIC packages for AI, networking, HPC, and 5G applications. This senior-level role involves designing complex flip-chip BGA packages with high-speed SerDes and power delivery requirements, collaborating closely with engineering experts to ensure signal integrity, manufacturability, reliability, and thermal management. Key responsibilities include managing multiple projects simultaneously, contributing to process improvements through automation and documentation, and utilizing tools like Cadence APD for physical design. Candidates should have extensive experience in flip-chip BGA package design, knowledge of high-speed SerDes, and proficiency with relevant EDA tools.

Skills

Cadence APD Allegro Package Designer Signal Integrity Power Integrity Flip-chip BGA SerDes HBM DDR5 Project Management Physical Design/Layout Package Engineering Design Automation Coding Co-design with external vendors Multi-time zone collaboration

What you'll do

Design complex flip-chip-BGA packages for high-speed SerDes and power delivery.
Ensure signal integrity, power integrity, manufacturability, reliability, and thermal aspects in package designs.
Manage and track multiple project schedules and priorities simultaneously.
Develop critical structures for SerDes, ADC/DAC, DDR, and other components.
Collaborate with global teams to create efficient package design processes.

What we're looking for

Minimum 10 years of experience in flip-chip BGA package design.
Expertise in high-speed SerDes and power integrity analysis required.
Proficiency with Cadence APD or equivalent EDA tools preferred.
Strong collaboration skills for working across multiple time zones globally.
Experience in physical design (layout) for complex ASIC packages needed.
Ability to manage and prioritize work on 2+ concurrent projects simultaneously.
Background in AI, networking, HPC, and 5G base station package designs.

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