Package Design Engineer
Broadcom
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How this pay compares to similar roles
This role pays more than 62% of similar roles. Most pay $146,500–$199,199 — the shaded band above. At the midpoint, this role pays about $184k versus about $173k for comparable roles.
Based on 240 similar postings.
Employer
Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software
Broadcom currently has 119 open roles on FindRole.
Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.
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At a glance
As a Package Design Engineer, you will join a worldwide R&D team to develop high-performance package designs for ASICs used in artificial intelligence, networking, high-performance computing, and 5G base stations. You will hold overall design responsibility for complex flip-chip-BGA packages, focusing on critical structures for SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, and DDR5. Your daily work involves managing multiple projects simultaneously while addressing signal integrity, power integrity, manufacturability, reliability, and thermal requirements. You will perform physical design layout and contribute to team efficiency through process development and automation. The role requires expertise in flip-chip BGA package design and experience with Cadence APD or similar tools. Preferred candidates possess skills in Cadence SKILL for Allegro or other design-automation coding to solve complex high-speed and high-power delivery challenges.
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