Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

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Work type: On-site
Location: Austin, TX
Posted: today

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Similar $184k

$142k most similar roles pay here $227k

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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TL;DR · Sr. IC Package Design Engineer (Silicon Engineering)

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As a Senior IC Package Design Engineer at SpaceX's Silicon Engineering team, you will lead packaging for custom ASICs and RFICs used in digital beam formers and modems. Your daily tasks include driving advanced package selection, optimizing BGA configurations, and conducting design verification and tapeout. You will collaborate with cross-functional teams to ensure feasibility and innovation in package designs, focusing on signal/power integrity and RF performance optimization. The role requires expertise in Cadence APD+/SIP tools, substrate design for mixed-signal die, and proficiency in SI/PI simulation tools like SIWave and ADS. This position demands a strong background in electrical engineering or physics with extensive experience in IC package design and Co-packaged Optics (CPO).

Skills

Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM simulation Package design electrical review Substrate design RF Digital High-speed and mixed signal die Package/SIP layout

What you'll do

Own and drive advanced package selection and BGA configuration for custom ASICs and RFICs.
Responsible for package/SIP layout optimization and design verification before tapeout.
Interface with cross-functional teams to ensure feasibility analysis and design coordination.
Simulate and optimize signal/power integrity and RF performance of the package design.
Drive methodology improvements and innovations in package design processes.

What we're looking for

5+ years of experience with IC package design
Experience with Co-packaged Optics (CPO) and Cadence APD+/SIP or similar tools
Thorough understanding of signal and power integrity fundamentals
Substrate design experience for RF, digital, high-speed and mixed signal die
Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, ADS
Strong problem-solving skills with engineering fundamentals

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