Senior AI/ML Logic Design Engineer

Qualcomm

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$127,200–$190,800 / yr
Posted
50 days ago
Freshness
Confirmed live 2 days ago
Closes
Jan 19, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $207k
This role $159k
$113k most similar roles pay here $260k

This role pays less than 81% of similar roles. Most pay $167,537–$246,150 — the shaded band above. At the midpoint, this role pays about $159k versus about $207k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Senior AI/ML Logic Design Engineer

Role Posting Log in to save

The AI/ML Logic Design Engineer-Senior joins the DSP Architecture and Design team to develop next-generation microarchitecture and logic for the Hexagon NPU. This role focuses on powering a wide range of AI/ML applications by driving RTL design in SystemVerilog from concept through tape-out. The engineer will perform early logic synthesis, static timing analysis, and power estimation to provide PPA feasibility feedback while evaluating the entire design pipeline from instruction set architecture through microarchitecture. Key responsibilities include debugging and optimizing EDA tool flows and utilizing simulators and synthesis engines. Required technical skills include proficiency in SystemVerilog, Python, Perl, shell scripting, and Git for design automation. The role requires a solid foundation in AI/ML concepts to solve complex hardware challenges while collaborating with architects and other logic designers to advance high-performance microprocessor designs.

Skills

SystemVerilog RTL Design Python Perl Shell Scripting Git Static Timing Analysis Logic Synthesis AI/ML Microarchitecture Instruction Set Architecture Digital Design

What you'll do

  • Develop microarchitecture for future generations of the Hexagon NPU.
  • Drive RTL design in SystemVerilog from initial concept through tape-out.
  • Perform early logic synthesis, static timing analysis, and power estimation to validate design choices.
  • Evaluate the end-to-end design pipeline from instruction set architecture through synthesis feasibility.
  • Utilize industry-standard digital design tools for simulation, synthesis, and performance analysis.
  • Debug, optimize, and enhance EDA tool flows to improve design iteration efficiency.
  • Automate design processes using Python, Perl, and shell scripting.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field with 2+ years of experience.
  • Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field with 1+ year of experience.
  • PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
  • At least 2 years of experience with high-performance microprocessor design.
  • Strong hands-on experience with SystemVerilog and deep understanding of RTL design methodologies.
  • Solid foundation in AI/ML concepts.
  • Proficiency in Python, Perl, and shell scripting for design automation and tooling.
  • Experience with Git and other revision control systems.

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