AI/ML Logic Design Engineer-Senior

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$133,900–$200,900 / yr
Posted
40 days ago
Freshness
Confirmed live yesterday
Closes
Mar 16, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $194k
This role $167k
$122k $247k
below market most similar roles pay here above market

This role pays less than 72% of similar roles. Most pay $162,000–$225,000 — the blue band above. At the midpoint, this role pays about $167k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · AI/ML Logic Design Engineer-Senior

The AI/ML Logic Design Engineer-Senior joins the DSP Architecture and Design team to develop next-generation microarchitecture and logic for the Hexagon NPU. This role involves designing microarchitecture for future NPU generations and driving RTL design from concept through tape-out. Key responsibilities include performing early logic synthesis, static timing analysis, and power estimation to provide PPA feasibility feedback. The engineer will evaluate the design pipeline from instruction set architecture through synthesis feasibility while debugging and optimizing EDA tool flows. Required technical skills include SystemVerilog for RTL design, Python, Perl, and shell scripting for design automation, and proficiency with Git. Candidates must possess a solid foundation in AI/ML concepts and experience with high-performance microprocessor design to solve complex hardware challenges for AI/ML applications.

What you'll do

  • Define and develop microarchitecture for future generations of the Hexagon NPU.
  • Drive RTL design in SystemVerilog from initial concept through to tape-out.
  • Perform early logic synthesis, static timing analysis, and power estimation to validate design choices.
  • Evaluate the design pipeline from instruction set architecture through RTL development and synthesis feasibility.
  • Utilize industry-standard simulators, synthesis engines, and power/performance analysis frameworks.
  • Debug, optimize, and enhance EDA tool flows to improve design iteration efficiency.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 2+ years of relevant work experience.
  • Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 1+ year of relevant work experience.
  • PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field.
  • 2+ years of experience with high-performance microprocessor design.
  • Strong hands-on experience with SystemVerilog and deep understanding of RTL design methodologies.
  • Solid foundation in AI/ML concepts.
  • Proficiency in Python, Perl, and shell scripting for design automation and tooling.
  • Experience with Git and other revision control systems.

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