RTL Feasibility Engineer, AI/ML Processors
Qualcomm
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How this pay compares to similar roles
This role pays less than 72% of similar roles. Most pay $162,000–$225,000 — the blue band above. At the midpoint, this role pays about $167k versus about $194k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.
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At a glance
The AI/ML Logic Design Engineer-Senior joins the DSP Architecture and Design team to develop next-generation microarchitecture and logic for the Hexagon NPU. This role involves designing microarchitecture for future NPU generations and driving RTL design from concept through tape-out. Key responsibilities include performing early logic synthesis, static timing analysis, and power estimation to provide PPA feasibility feedback. The engineer will evaluate the design pipeline from instruction set architecture through synthesis feasibility while debugging and optimizing EDA tool flows. Required technical skills include SystemVerilog for RTL design, Python, Perl, and shell scripting for design automation, and proficiency with Git. Candidates must possess a solid foundation in AI/ML concepts and experience with high-performance microprocessor design to solve complex hardware challenges for AI/ML applications.
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