DFT Engineer

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$139,680–$209,520 / yr
Posted
28 days ago
Freshness
Confirmed live yesterday
Closes
Aug 14, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $176k
This role $175k
$127k most similar roles pay here $224k

This role pays more than 51% of similar roles. Most pay $139,517–$212,875 — the shaded band above. At the midpoint, this role pays about $175k versus about $176k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · DFT Engineer

DFT Engineer As a DFT Engineer, you will join the team to define, design, and verify robust Design for Test and Design for Debug solutions for complex, high-performance SoCs. You will collaborate with architecture, RTL, firmware, and verification teams to integrate DFX features that enable efficient silicon validation, bring-up, and debug throughout the product lifecycle. Your daily responsibilities include designing DFX logic, creating test plan documentation, building directed and random verification tests, and debugging test failures to resolve design defects. You will utilize technologies including JTAG, LBIST, MBIST, Scan, ATPG, and the Tessent tools suite. Required skills include proficiency in Verilog, SystemVerilog, SystemC, C++, UVM concepts, and scripting languages like Perl, Ruby, or Shell. This role addresses critical technical challenges in advanced processor designs to ensure reliable silicon production and functionality.

What you'll do

  • Design and integrate DFX logic into complex high-performance SoCs.
  • Develop comprehensive test plan documentation covering hardware, firmware, and software driver use cases.
  • Estimate time requirements for developing new feature tests and updating the test environment.
  • Build directed and random verification tests for SoC features.
  • Debug test failures to identify root causes and resolve design defects with RTL and firmware teams.
  • Analyze functional and code coverage metrics to modify or add tests as needed.
  • Ensure DFX features support efficient silicon validation, bring-up, and debug throughout the product lifecycle.

What we're looking for

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience with DFT and DFD architecture, design, and verification (preferred).
  • Experience with JTAG, LBIST, MBIST, Scan, and ATPG (preferred).
  • Familiarity with the Tessent tools suite, including Scan and ATPG (preferred).
  • Experience with test pattern generation, bring-up, and debug on ATE (preferred).
  • Experience with post-silicon bring-up (preferred).
  • Experience with IP-level and ASIC verification (preferred).
  • Experience debugging firmware and RTL code using simulation tools; experience with Verilog, SystemVerilog, SystemC, C++, UVM, and scripting languages like Perl or Ruby (preferred).

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Hybrid