GPU Design Verification Engineer, Shader Core

Amd

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Diego, CA
Salary: $144,800–$217,200 / yr
Posted: 56 days ago
Freshness: Confirmed live yesterday
Closes: Oct 19, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $203k

This role $181k

$132k $260k

below market most similar roles pay here above market

This role pays less than 63% of similar roles. Most pay $176,100–$230,762 — the blue band above. At the midpoint, this role pays about $181k versus about $203k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · GPU Design Verification Engineer, Shader Core

Role Posting Log in to save

The GPU Design Verification Engineer - Shader Core joins a team responsible for verifying the GPU shader processor core, a critical component for high-performance graphics and compute workloads. The engineer will develop and execute comprehensive verification strategies, including designing and executing directed and constrained-random verification tests to ensure hardware quality. Key responsibilities involve collaborating with architecture, hardware, and firmware teams to validate features, debugging simulation failures, and analyzing functional and code coverage results. The role requires proficiency in Verilog, SystemVerilog, C, C++, and scripting languages like Perl, Ruby, or shell scripting. Candidates should possess knowledge of UVM-based environments, SystemC, Transaction-Level Modeling, and Linux-based development. The work focuses on IP-level ASIC design verification, graphics pipeline concepts, and improving verification methodologies and automation.

Skills

SystemVerilog UVM Verilog C C++ SystemC TLM RTL ASIC Design Verification Linux Perl Ruby Shell Scripting Makefiles Simulation Hardware Verification GPU Architecture High-Level Synthesis

What you'll do

Develop comprehensive verification plans for new shader core features across hardware, firmware, and software.
Design, develop, and execute directed and constrained-random verification tests.
Debug simulation failures to identify and determine the root causes of functional issues.
Analyze functional and code coverage results to implement improvements and achieve coverage goals.
Partner with design and firmware engineers to resolve defects and improve overall design quality.
Enhance verification methodologies, automation, and test infrastructure to improve productivity.
Estimate verification effort and identify necessary enhancements for verification environments.

What we're looking for

Passionate about processor architecture, digital design, and hardware verification.
Strong analytical and debugging skills to identify and resolve functional issues.
Ability to communicate effectively across geographically distributed teams.
Experience mentoring others or providing technical leadership (preferred).
Experience with IP-level ASIC design verification (preferred).
Strong knowledge of UVM-based verification environments and methodologies (preferred).
Proficiency with Verilog, SystemVerilog, C, and C++ (preferred).
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline (preferred).

Similar roles

GPU Design Verification Engineer

Qualcomm

San Diego, CA +3 40 days ago $169,500–$254,300

System Verilog UVM C/C++ Verilog VHDL Python Vulkan Make Airflow Veloce Palladium Zebu FPGA QEMU GDB Formal Verification Emulation Prototyping

4+ yrs exp

Save

Graphics (GPU) Design Verification Engineer

Apple Inc

Austin, TX 40 days ago

System Verilog UVM OVM Universal Verification Methodology Python Ruby Perl VCS Verdi IES DVE HDL SIMD GPU Architecture Functional Coverage Waveform Viewers

10+ yrs exp

Save

Graphics (GPU) Design Verification Engineer

Apple Inc

Austin, TX 40 days ago

UVM OVM C++ Verilog Python Ruby Perl HDL SIMD Computer Architecture VCS Verdi IES DVE Functional Coverage Waveform Viewers

Save

Graphics (GPU) Design Verification Engineer

Apple Inc

Austin, TX 40 days ago

System Verilog C++ UVM OVM Python Ruby Perl VCS Verdi IES DVE HDL SIMD GPU Architecture Functional Coverage Waveform Viewers

3+ yrs exp

Save

GPU Verification Engineer

Nvidia

Westford, MA 78 days ago $136,000–$218,500

ASIC Verification C/C++ Python Perl Shell VCS Emulation FPGA Computer Architecture Memory Models Post-silicon Verification Debug Tools

5+ yrs exp

Save

GPU Design Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600

SystemVerilog UVM Verilog VHDL RTL Verification GPU Architecture Graphics Pipeline Perl Ruby Shell Scripting Makefiles HDL Simulators Waveform Viewers Functional Coverage

3+ yrs exp

Save