RTL / Circuit IP Design Engineer

Amd

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$166,400–$249,600 / yr
Posted
19 days ago
Freshness
Confirmed live today
Closes
Sep 14, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $206k
This role $208k
$138k most similar roles pay here $264k

This role pays more than 51% of similar roles. Most pay $170,277–$241,750 — the shaded band above. At the midpoint, this role pays about $208k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 512 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 512 roles with salary data.

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At a glance

TL;DR · RTL / Circuit IP Design Engineer

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As an RTL / Circuit IP Design Engineer, you will join the team responsible for planning, building, and executing the implementation of new and existing features for programmable embedded IP. You will work with architects, hardware engineers, and software engineers to develop designs that meet specific power, performance, and area targets while ensuring accurate modeling for customer use. Your daily responsibilities include authoring implementation documentation, estimating timelines, building directed and random verification tests, and debugging test failures to resolve design defects. The role requires proficiency in Verilog, SystemVerilog, and RTL implementation, along with experience in UVM, Linux, and Windows environments. You will utilize Python, Perl, Ruby, or Shell for automation while applying knowledge of circuit design concepts, UPF, and power domain crossings to solve complex problems within the programmable embedded IP product space.

Skills

RTL System Verilog Verilog UVM Python Perl Ruby Makefile Linux Windows HLS UPF Synthesis Timing Analysis Circuit Design Simulation Tools

What you'll do

  • Plan, build, and execute the implementation of new and existing features for programmable embedded IP.
  • Ensure final designs meet product targets for power, performance, area, and intended functionality.
  • Author implementation documentation covering hardware interactions and software modeling use cases.
  • Estimate implementation timelines and coordinate with cross-functional teams to incorporate feedback.
  • Build directed and random verification tests for the design.
  • Debug test failures to identify root causes and resolve design defects with RTL and firmware engineers.
  • Analyze functional and code coverage metrics to modify or add tests as required.

What we're looking for

  • Bachelor's or Master's degree in computer engineering or Electrical Engineering.
  • Proficiency in IP level RTL implementation (preferred).
  • Proficiency in debugging RTL code using simulation tools (preferred).
  • Experience with Verilog and SystemVerilog (preferred).
  • Proficiency in navigating UVM generated test results in Linux and Windows environments (preferred).
  • Strong understanding of circuit design concepts and RTL synthesis best practices (preferred).
  • Proficiency in analytical problem solving, including timing analysis and constraint setting (preferred).
  • Experience with scripting languages such as Python, Perl, Ruby, Makefile, or shell (preferred).

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