ASIC Engineering Technical Leader

Cisco

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Jose, CA
Salary: $186,900–$267,700 / yr
Employment: Full-time
Posted: 6 days ago
Freshness: Confirmed live yesterday
Closes: Oct 30, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $206k

This role $227k

$153k most similar roles pay here $280k

This role pays more than 71% of similar roles. Most pay $177,250–$234,325 — the shaded band above. At the midpoint, this role pays about $227k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 240 open roles on FindRole.

Listed pay typically runs $167,700–$245,000 across 188 roles with salary data.

Most-posted roles

View all roles at Cisco

At a glance

TL;DR · ASIC Engineering Technical Leader

Role Posting Log in to save

As an ASIC Engineering Technical Leader within Silicon Operations, you will join the Central Hardware Group to lead the design, development, and testing of Silicon One ASICs. You will collaborate with cross-functional teams and manufacturing partners to manage high-volume production test activities, triage failures, and drive component failure analysis, containment, and root cause corrective actions. The role requires expertise in SOC, VLSI, bring-up, characterization, qualification, and product engineering. Key technical requirements include proficiency with Advantest 93000 testers for characterization and production testing, as well as experience with logic or SRAM and Voltage/Frequency characterization. You will utilize JMP software for statistical data analysis while applying knowledge of DFT insertion techniques including Scan, ATPG, JTAG, MBIST, PVT, and SerDes to improve yield and reduce test time for advanced silicon products.

Skills

ASIC VLSI SOC DFT Scan ATPG JTAG MBIST PVT SerDes Advantest 93000 Smartest 7 JMP SRAM Characterization

What you'll do

Lead the design, development, and testing of Silicon One ASICs.
Manage high-volume manufacturing test and quality issues with Tier-1 OSAT partners.
Drive component failure analysis, containment, and root cause corrective actions.
Orchestrate production test activities and triage failures with manufacturing partners.
Perform characterization and production testing using Advantest 93000 testers.
Execute yield improvement and test time reduction activities for silicon products.
Conduct statistical data analysis to evaluate product performance and quality.

What we're looking for

Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
9+ years of experience in SOC/VLSI/bring-up, characterization, qualification, and product engineering.
Working knowledge of Advantest 93000 tester (Smartest 7 and 8) for characterization and production testing.
Experience with logic or SRAM and Voltage/Frequency characterization (preferred).
Proficiency in statistical data analysis using JMP software or other tools (preferred).
Knowledge of state-of-the-art trends in DFT insertion techniques, including Scan, ATPG, JTAG, MBIST, PVT, and SerDes (preferred).
Experience with yield improvement and test time reduction activities (preferred).
Strong multi-functional communication, problem-solving, and leadership skills to collaborate across technical entities (preferred).

Save