ASIC Engineering Technical Leader

Cisco

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Employment
Full-time
Posted
11 days ago
Freshness
Confirmed live yesterday
Closes
Oct 16, 2026

Market check

Salary context

How this pay compares to similar roles

Similar $206k
$154k most similar roles pay here $265k

This listing doesn't post a salary. Most similar roles pay $177,250–$234,100.

Based on 240 similar postings.

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About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 236 open roles on FindRole.

Listed pay typically runs $167,700–$245,000 across 184 roles with salary data.

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At a glance

TL;DR · ASIC Engineering Technical Leader

As an ASIC Engineering Technical Leader, you will join a multi-disciplined engineering team to define, design, and verify ASIC subsystems for various platforms while meeting specific power, performance, and area goals. You will manage the architecture of high-performance ASICs, own complex functional areas, and create reusable code to drive efficiency across projects. Your daily responsibilities include debugging at the system level, defining verification strategies, and overseeing infrastructure and testing environments. You will lead technical expertise in physical design functions, coordinate with stakeholders for PD and DV flows, and manage electrical planning for interfaces. The role requires expertise in full chip timing closure, PI, and PV while collaborating with vendors to ensure requirements are met. This position focuses on the development of high-volume, high-quality ASIC subsystems and the creation of robust design solutions across product lines.

What you'll do

  • Manage the definition, architecture, and design of high-performance ASICs and subsystems.
  • Develop and document ASIC subsystems for high-volume production and quality standards.
  • Create and oversee reusable code to improve engineering efficiency across projects.
  • Define verification strategies and manage infrastructure and testing environments.
  • Lead technical expertise for physical design functions including timing closure, PI, and PV.
  • Own the full electrical planning and specifications of electrical interfaces.
  • Develop multiple solutions, test vehicles, and perform comprehensive verification and validation.
  • Establish processes, methods, and tools for complex development implementations.

What we're looking for

  • Bachelor's degree plus 8 years of related experience, or Master's plus 6 years, or PhD plus 3 years.
  • Experience in defining, designing, and verifying ASIC and ASIC subsystems for high-volume production.
  • Ability to manage the definition, architecture, and design of high-performance ASICs.
  • Expertise in developing reusable code and managing complex functional areas.
  • Ability to debug at the system level and provide robust design solutions across products.
  • Experience defining verification strategies and coordinating with stakeholders for PD and DV flows.
  • Ability to lead technical expertise in physical design functions, including timing closure, PI, and PV.
  • Capability to own full electrical planning and specifications of electrical interfaces.

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