ASIC Design Engineer, Satellite Communication

Amazon Inc

Confirmed live today Trusted

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $122,600–$170,000 / yr
Posted: 20 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $190k

This role $146k

$109k $248k

below market most similar roles pay here above market

This role pays less than 86% of similar roles. Most pay $162,000–$217,525 — the blue band above. At the midpoint, this role pays about $146k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 643 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 636 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer, Satellite Communication

Role Posting Log in to save

ASIC Design Engineer, Satellite Communication The ASIC Design Engineer, Satellite Communication joins a high performance ASIC design team to develop proprietary IP for Low Earth Orbit satellites and gateways. This role involves defining and implementing digital chip SOCs for wireless communications, focusing on modems, high-speed interfaces, embedded processors, and DSP solutions using latest CMOS generation technologies. You will implement wireless system architecture from system specifications to RTL, optimizing for timing, power, and area. Key responsibilities include integrating third-party IP blocks, configuring control plane architectures for PHY subsystems, and performing initial synthesis and timing analysis. You will utilize AI-assisted techniques and industry standard tools with Python or Perl scripting. Technical skills include UVM, System C, and DPI-C for system level verification, as well as experience with ARM, various DSP ISAs, DMAs, and NoC.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design RTL SoC UVM System C DPI-C Python Perl DSP ARM DFT Synthesis Timing Analysis NoC CMOS Low Power Design

What you'll do

Implement wireless system architecture from system specifications to RTL and chip-level validation.
Develop high-performance digital solutions using AI-assisted techniques to optimize throughput, latency, and availability.
Define, configure, and integrate key IP blocks and 3rd party blocks for the SoC.
Design and implement the control plane architecture for the PHY subsystem.
Perform initial synthesis and timing analysis to meet PPA objectives.
Develop test plans and assist the verification team with unit verification using UVM/SystemC.
Assist with hardware debug and bring-up processes.
Analyze low power design impacts and DFT requirements for various blocks.

What we're looking for

Bachelor's degree in Electrical Engineering or a related field.
2+ years of experience as an ASIC Design Engineer.
Experience troubleshooting and debugging technical systems with strong analytical skills and software development experience.
Experience verifying logic at multiple levels from IP blocks to SoCs to full system testing.
Must be a U.S. citizen, national, permanent resident, refugee, or granted asylum.
Master's degree in Electrical or Communications Engineering or a related field (preferred).
Experience with industry standard tools and scripting languages like Python or Perl (preferred).
Export Control Requirement.

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