below marketmost similar roles pay hereabove market
This role pays less than
76%
of similar roles. Most pay
$166,746–$227,500
— the blue band above.
At the midpoint, this role pays about
$162k
versus about
$197k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
3595 open roles
on FindRole.
Listed pay typically runs
$166,600–$277,600
across 2772 roles with salary data.
The ASIC Design Engineer joins a complex hardware team to craft upcoming products by solving unsolved technical challenges. The role involves architecture research and development for memory or highly interconnected system architectures, specifically focusing on RTL and micro-architecture. Key responsibilities include driving new memory system architectures from DRAM up, exploring trade-offs in system performance, area, and power consumption, and developing memory hierarchies for high-performance parallel computer architectures like system-on-a-chip SOCs. The engineer will also work with performance teams to develop simulators, models, and test suites. Required skills include characterizing performance, conducting comparison studies, and documenting results. Specialized knowledge in high-performance memory subsystems, including DRAM controllers, PHY architecture, DFI interfaces, and calibration or training mechanisms, is highly preferred for this hardware design position.
What does a ASIC Design Engineer earn in California?
Median $214000 from 51 postings across 8 companies.
Research and develop memory or highly interconnected system architectures.
Design RTL and micro-architecture for ASIC components.
Design and develop high-performance memory subsystems including DRAM controllers and PHYs.
Implement DFI interfaces and DRAM interface calibration/training mechanisms.
Characterize system performance and conduct comparative studies.
Document and publish technical results from performance characterizations.
Develop memory hierarchies for high-performance parallel computer architectures.
Create performance/power simulators, models, and test suites.
What we're looking for
Experience in ASIC design with RTL/micro-architecture.
Experience in architecture research and/or development of memory or highly interconnected system architectures.
Systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.
Knowledge of high-performance memory subsystem, including dram controller, PHY architecture, DFI interface, and calibration/training mechanisms (preferred).
Drive new memory system architectures from DRAM up (preferred).
Explore architecture and feature trade-offs in system performance, area, and power consumption (preferred).
Develop memory hierarchies for high performance parallel computer architectures (system-on-a-chip SOC) (preferred).