This role pays more than
94%
of similar roles. Most pay
$176,200–$227,300
— the shaded band above.
At the midpoint, this role pays about
$255k
versus about
$202k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
1984 open roles
on FindRole.
Listed pay typically runs
$175,000–$277,600
across 1590 roles with salary data.
As an ASIC Design Engineer - Cache Controller, you will join the team responsible for developing hardware for cache subsystems within high-performance systems on a chip. Your daily responsibilities include developing cache micro-architecture based on model analysis and architecture guidelines while exploring critical trade-offs in system performance, area, and power consumption. You will develop and debug register-transfer level design for various sections of the cache subsystem, perform front-end netlist and area/timing analysis, and collaborate with physical design teams to achieve timing closure. The role requires expertise in memory systems, multi-processor cache coherence protocols, and high-performance coherent memory systems or interconnect architectures. You will address complex challenges involving high-bandwidth multi-client memory subsystems that must simultaneously meet real-time, low latency, and high-bandwidth requirements within the SoC memory hierarchy.
What does a ASIC Design Engineer earn in California?
Median $214000 from 47 postings across 8 companies.