ASIC Design Engineer

Apple Inc

Confirmed live yesterday Low trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
144 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $190k
This role $255k
$126k most similar roles pay here $346k

This role pays more than 95% of similar roles. Most pay $162,000–$218,393 — the shaded band above. At the midpoint, this role pays about $255k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer

As an ASIC Design Engineer, you will join a complex team focused on crafting upcoming products and transforming hardware technology. Your daily responsibilities involve architecture research and development of memory or highly interconnected system architectures, as well as RTL and micro-architecture work. You will drive new memory system architectures from DRAM up, explore trade-offs in system performance, area, and power consumption, and develop memory hierarchies for high-performance parallel computer architectures within a system-on-a-chip environment. The role requires expertise in high-performance memory subsystems, including dram controller design, PHY architecture, DFI interface, and calibration mechanisms. Additionally, you will collaborate with the performance team to develop simulators, models, and test suites while performing comparison studies and documenting results. You will solve complex problems related to advanced hardware systems and integrated circuit designs.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

What you'll do

  • Research and develop memory or highly interconnected system architectures.
  • Design RTL and micro-architecture for ASIC components.
  • Develop high-performance memory subsystems including DRAM controllers and PHY architectures.
  • Implement DFI interfaces and DRAM interface calibration/training mechanisms.
  • Drive new memory system architectures from the DRAM level upward.
  • Analyze trade-offs between system performance, area, and power consumption.
  • Develop memory hierarchies for high-performance parallel computer architectures and SoCs.
  • Create performance/power simulators, models, and test suites in coordination with the performance team.

What we're looking for

  • Bachelor's Degree is required.
  • Candidates must have at least 10 years of experience.
  • Experience in ASIC design including RTL and micro-architecture is required.
  • Experience in architecture research or development for memory or highly interconnected system architectures is required.
  • Knowledge of high-performance memory subsystems, including DRAM controllers, PHY architecture, and DFI interfaces is preferred.
  • Experience in characterizing performance, conducting comparison studies, and documenting results is required.
  • Ability to drive new memory system architectures from DRAM up is preferred.
  • Experience developing memory hierarchies for high-performance parallel computer architectures (SoC) is preferred.

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