ASIC Design Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Beaverton, OR
Posted
52 days ago

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How this pay compares to similar roles

Similar $191k
$143k most similar roles pay here $235k

This listing doesn't post a salary. Most similar roles pay $165,250–$216,250.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer

Join our dynamic team as an ASIC Design Engineer where you will play a pivotal role in crafting the next generation of Apple’s cutting-edge products. Your responsibilities include writing microarchitecture specifications, designing and debugging complex logic designs, integrating IPs into SOC, and supporting front-end integration activities such as Lint, CDC, Synthesis, and ECO. You will collaborate closely with verification, emulation, STA, and physical design teams to ensure seamless integration and high-quality output. Ideal candidates have Verilog RTL Logic Design experience, along with expertise in multiple clock domains and asynchronous interfaces. Proficiency in front-end tools and methodologies is essential, as is the ability to communicate effectively across various internal groups. Familiarity with scripting languages like Perl, Python, or TCL is a plus, contributing to your success in this fast-paced environment focused on delivering innovative solutions at scale.

What you'll do

  • Write microarchitecture and design specifications for SOC components.
  • Design and debug complex logic circuits using Verilog RTL.
  • Integrate complex IPs into the System-on-Chip (SOC).
  • Support front-end integration activities including Lint, CDC, Synthesis.
  • Collaborate with verification, emulation, STA, and physical design teams.

What we're looking for

  • Experience in Verilog RTL logic design.
  • Proficiency in writing specifications and converting them to designs.
  • Hands-on experience with multiple clock domains and asynchronous interfaces.
  • Expertise in front-end tools and methodologies for chip development.
  • Knowledge of system architecture, CPU & IP integration, power management.
  • Ability to collaborate effectively across SOC Design and Verification teams.
  • Familiarity with scripting languages like Perl, Python, or TCL.

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