ASIC Design and Integration Engineer

Apple Inc

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Work type: On-site
Location: Beaverton, OR
Posted: 78 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Similar $194k

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

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At a glance

TL;DR · ASIC Design and Integration Engineer

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The ASIC Design and Integration Engineer joins the Silicon Engineering team to develop custom SoCs that drive product performance and efficiency. The primary responsibilities involve the design and implementation of complex ASICs, specifically developing RTL using SystemVerilog and performing synthesis. The role requires collaborating with simulation-based and formal verification teams to ensure robust design validation while integrating digital designs into complex SoCs with hardware and software teams. Key tasks include conducting timing analysis and power optimization to achieve specific PPA goals and creating detailed micro-architecture and design documentation. Candidates must possess technical skills in SystemVerilog, RTL design, and synthesis. Knowledge of CDC and RDC is a plus. This position focuses on solving technical challenges within the domain of custom silicon design and integration.

Skills

SystemVerilog RTL Design ASIC Design Synthesis Formal Verification Simulation Timing Analysis Power Optimization CDC RDC Micro-architecture PPA

What you'll do

Design and implement complex ASICs using SystemVerilog.
Develop RTL and perform synthesis for custom SoCs.
Coordinate with simulation and formal verification teams to validate designs.
Integrate digital designs into complex SoCs with hardware and software teams.
Conduct timing analysis and power optimization to meet PPA goals.
Create detailed micro-architecture and design documentation.

What we're looking for

Bachelor's degree in a relevant field.
Experience in ASIC design including RTL design and verification (preferred).
Hands-on experience with ASIC design tools and methodologies (preferred).
Proficiency in SystemVerilog, RTL design, and synthesis (preferred).
Strong analytical and problem-solving skills (preferred).
Excellent communication and teamwork skills to work effectively in cross-functional teams (preferred).
Knowledge in CDC and RDC (preferred).