ASIC Design and Integration Engineer

What you'll do

• Design and implement complex ASICs using SystemVerilog for RTL development.
• Perform synthesis and front-end chip development processes including CDC, RDC, LINT, and LEC.
• Collaborate with verification teams to ensure robust design validation through simulation and formal methods.
• Integrate digital designs into complex SoCs in coordination with hardware and software teams.
• Conduct timing analysis and implement power optimization strategies to meet PPA goals.
• Design high-speed I/O components and implement relevant protocols like PCIe.
• Create detailed micro-architecture and design documentation for the development process.

What we're looking for

• Minimum of BS degree and 3 years of relevant industry experience.
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field (preferred).
• 3+ years of proven experience in ASIC design, including RTL design and verification (preferred).
• Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis (preferred).
• Experience with high-speed I/O design and protocols, such as PCIe (preferred).
• Familiarity with custom ASIC design and FPGA prototyping (preferred).
• Hands-on experience in all aspects of front-end chip development process including CDC, RDC, LINT, and LEC (preferred).
• Knowledge of low-power design techniques and power optimization strategies (preferred).