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10 of up to 20 (filtered)

GPU Physical Verification Design Engineer

Apple Inc

Santa Clara, CA 25 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
Physical Verification DRC LVS ERC Calibre P&R Flows Floorplanning GPU Architecture Design for Yield Manufacturability ESD Multi Vt Strategies Global Timing Verification
10+ yrs exp

GPU Physical Verification Design Engineer

Apple Inc

Austin, TX 25 days ago
Actively hiring Confirmed live today High trust
Physical Verification DRC ERC LVS Calibre P&R Flows Floorplanning ESD Design for Yield Manufacturability Multi Vt Strategies GPU Architecture Global Timing Verification Process ANT PERC
10+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

San Jose, CA 74 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
LVS DRC ANT HVDRC Physical Verification Python Perl Tcl Mentor Calibre Synopsys ICV Layout Design Tapeout Design-for-Manufacturing Design-for-Yield Lithography RDL Design
10+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

Beaverton, OR 74 days ago
Actively hiring Confirmed live today Trusted
LVS DRC ANT HVDRC Physical Verification Python Perl Tcl Mentor Calibre Synopsys ICV Tapeout Layout Design Design-for-Manufacturing Design-for-Yield Lithography RDL ESD
10+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

Austin, TX 74 days ago
Actively hiring Confirmed live today High trust
LVS DRC ANT HVDRC ASIC Physical Design Physical Verification Mentor Calibre Synopsys ICV Python Perl Tcl Tapeout Layout Design Design-for-Manufacturing Design-for-Yield Lithography RDL ESD Mixed Signal Back-end Verification
10+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

Beaverton, OR 110 days ago
Actively hiring Confirmed live today Trusted
LVS DRC ANT HVDRC ASIC Physical Design Physical Verification Mentor Calibre Synopsys ICV Python Perl Tcl Tapeout Layout Design Design-for-Manufacturing Design-for-Yield Lithography RDL ESD Mixed Signal Back-end Verification
3+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

Beaverton, OR 110 days ago
Actively hiring Confirmed live today Trusted
LVS DRC ANT Physical Verification Layout Design RTL to GDS Mentor Calibre Synopsys ICV Design-for-Manufacturing Design-for-Yield Lithography Padring Bump RDL Scripting Signoff Closure

SoC Physical Design Verification Engineer

Apple Inc

Austin, TX 114 days ago
Actively hiring Confirmed live today Trusted
LVS DRC ANT HVDRC ASIC Physical Design Physical Verification Mentor Calibre Synopsys ICV Python Perl Tcl Tapeout Layout Design Design-for-Manufacturing Design-for-Yield Lithography RDL ESD Mixed Signal Back-end Verification
3+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

San Jose, CA 115 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
LVS DRC ANT HVDRC ASIC Physical Design Physical Verification Python Perl Tcl Mentor Calibre Synopsys ICV Tapeout Layout Design Design-for-Manufacturing Design-for-Yield Lithography RDL ESD
3+ yrs exp

SoC Physical Design Verification Engineer

Apple Inc

San Jose, CA 115 days ago $129,300–$194,700
Actively hiring Confirmed live today Trusted Below market
LVS DRC ANT Physical Verification Layout Design RTL to GDS Mentor Calibre Synopsys ICV Design-for-Manufacturing Design-for-Yield Lithography Padring Bump RDL Scripting Signoff Closure