GPU Physical Verification Design Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
15 days ago
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Confirmed live today

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Similar $207k
$138k most similar roles pay here $265k

This listing doesn't post a salary. Most similar roles pay $177,200–$236,487.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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TL;DR · GPU Physical Verification Design Engineer

As a GPU Physical Verification Design Engineer within the Silicon Technologies group, you will drive physical verification aspects throughout the design cycle for high-performance, power-efficient GPUs. You will collaborate with the Physical Design team to establish methodologies, guidelines, and checklists while managing and resolving complex flow issues from early planning through tapeout. Your daily work involves ensuring physical convergence, integrating internal and external IP, and addressing challenges like multi-voltage domains, ESD solutions, and mixed-signal block integration. The role requires expertise in hierarchical design, P&R flows, and tools such as Calibre to perform Base/Metal DRC, ERC, LVS, Process ANT, PERC, and ESD checks. You will navigate large subsystem designs exceeding 20M gates at frequencies over 1GHz, addressing critical manufacturing concerns like Design for Yield, multi-Vt strategies, and thermal management within the GPU architecture.

What you'll do

  • Execute complete physical design verification closure from early planning through tapeout.
  • Drive physical verification methodologies and "best known methods" to streamline the design cycle.
  • Develop guidelines, checklists, and tracking systems for physical design execution.
  • Resolve complex design and flow issues related to physical design and large chip integration.
  • Perform physical verification checks including DRC, ERC, LVS, Process ANT, PERC, and ESD.
  • Integrate internal and external IP while specifying requirements in the physical domain.
  • Manage multi-voltage/clock domains, ESD solutions, and mixed-signal block integration for high-performance GPUs.
  • Address design issues related to yield, manufacturability, multi-Vt strategies, and thermal management.

What we're looking for

  • Bachelor of Science degree and 10 years of relevant experience.
  • Experience with hierarchical design approach, top-down design, budgeting, and physical convergence.
  • Experience with Physical Verification checks including Base/Metal DRC, ERC, LVS, Process ANT, PERC, or ESD.
  • Experience with P&R flows and Physical Verification tools such as Calibre.
  • Experience with Floorplanning tools, P&R flows, global timing verification, and Physical Design Verification Flows.
  • Experience integrating IP from internal/external vendors and specifying physical domain requirements (preferred).
  • Experience with multi-voltage/clock domains, ESD solutions, and mixed signal block integration (preferred).
  • Experience with large subsystem designs (>20M gates) at frequencies over 1GHz using new technologies (preferred).

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