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13 of up to 20 (filtered)

Staff Engineer, Design Verification

Samsung Semiconductor

San Jose, CA 2 days ago $163,000$253,000
Actively hiring Posted this week Verified listing Competitive pay
UVM SystemVerilog C++ Python Perl SoC IP verification FPGA emulation platforms AI accelerators microarchitecture computer architecture RTL debugging scripting languages

Staff Engineer, ASIC Design Verification

Samsung Semiconductor

San Jose, CA 2 days ago $163,000$253,000
Actively hiring Posted this week Verified listing Above market
UVM C++ SystemVerilog ASIC verification UCIe HBM controller Memory DFT DDR Custom HBM CI/CD

Senior Staff Engineer, Design Verification

Samsung Semiconductor

San Jose, CA 2 days ago $189,000$301,000
Actively hiring Posted this week Verified listing Above market
UVM SystemVerilog C++ Python Perl SoC IP verification FPGA emulation platforms AI accelerators Mentoring Debugging RTL Microarchitecture Computer architecture

ASIC Design Verification Emulation Engineer

Cisco

San Jose, CA 2 days ago $165,000$241,400
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Python Perl C++ ASIC Verification Emulation FormalVerification Docker CI/CD
Hybrid

ASIC Design Verification Engineer

Cisco

Remote (San Jose, CA) 2 days ago $152,500$219,200
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Perl Python Veloce Palladium Zebu HAPS IEV VC Formal PCIe CXL Ethernet RDMA DDR TCP
Remote

ASIC Design Verification Engineer

Cisco

San Jose, CA 4 days ago $165,000$241,400
Actively hiring Posted this week Verified listing Competitive pay
SystemVerilog UVM Python Perl C++ Data_center_technologies Hyperscalers AI_Networking Industry_standards Advanced_emulation Formal_verification_tools Silicon_debugging
Hybrid

ASIC Design Verification Engineering Technical Leader

Cisco

Remote (San Jose, CA) 11 days ago $183,800$263,600
Actively hiring Verified listing Above market
SystemVerilog UVM Linux C++ Python Perl Veloce Palladium Zebu HAPS CI/CD Networking Dashboard_management Emulation_platforms
Remote

Principal Engineer, GPU Design Verification (Subsystems)

Samsung Electronics

Remote (San Jose, CA) 18 days ago $221,700$364,800
Actively hiring Verified listing Above market
SystemVerilog UVM C++ Python Perl Constrained-random testing Functional coverage Assertions CI/CD Debugging Performance profiling Memory subsystems Coherent interconnects GPU architecture Formal verification Emulation
Remote

Verification Engineer

Broadcom

San Jose, CA 24 days ago $120,000$192,000
Actively hiring Verified listing Competitive pay
SystemVerilog UVM Python C/C++ ASIC verification flows block-level verification system-level verification formal verification methodologies firmware development embedded C PHY layers adaptation techniques CPU DDR bus protocols network protocols DSP design AI-assisted tools

ASIC Design Verification Engineer

Cisco

Remote (San Jose, CA) 67 days ago $165,000$241,400
Actively hiring Verified listing Competitive pay
SystemVerilog UVM ASIC Linux C C++ Python Perl Networking Formal verification
Remote