ASIC Design Verification Engineer

Cisco

Confirmed live yesterday Low trust
Remote

Quick summary

Work type
Remote
Location
San Jose, CA
Salary
$165,000–$241,400 / yr
Posted
53 days ago
Freshness
Confirmed live yesterday
Closes
Sep 30, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k
This role $203k
$130k most similar roles pay here $253k

This role pays more than 62% of similar roles. Most pay $162,000–$216,062 — the shaded band above. At the midpoint, this role pays about $203k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 196 open roles on FindRole.

Listed pay typically runs $167,700–$245,200 across 196 roles with salary data.

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At a glance

TL;DR · ASIC Design Verification Engineer

As an ASIC Design Verification Engineer within the Common Hardware Group, you will perform end-to-end verification for high-end switching products. You will be responsible for developing simulation models, test plans, and performing performance analysis while constructing essential testbench components such as scoreboards, agents, sequencers, and monitors. The role involves collaborating with hardware and software designers to verify design blocks and top-level systems. To succeed, you must possess expertise in System Verilog and UVM, along with experience in ASIC design and verification processes, debugging, and methodology. Preferred skills include formal verification, post-silicon lab bring-up, and proficiency in Linux, C/C++, Python, or Perl. This position focuses on the technical challenge of verifying complex silicon architectures for networking hardware used in enterprise environments, service provider networks, and web-scale data centers.

What you'll do

  • Perform end-to-end verification of design blocks and top-level systems for high-end switching products.
  • Develop simulation models, test plans, directed/random tests, and functional coverage metrics.
  • Conduct multi-chip and system simulations to perform detailed performance analysis.
  • Construct testbench components including scoreboards, agents, sequencers, and monitors.
  • Execute ASIC design verification processes using System Verilog and UVM methodologies.
  • Debug and verify hardware blocks, clusters, and full chip levels for advanced ASICs.

What we're looking for

  • Bachelor's degree in electrical/computer science/computer engineering or related field with 7+ years of experience.
  • Master's degree in electrical/computer science/computer engineering or related field with 4+ years of experience.
  • PhD in electrical/computer science/computer engineering or related field with 1 year of experience.
  • Experience in System Verilog and UVM.
  • Experience with ASIC design and verification processes, debugging, methodology, and tools.
  • Experience verifying blocks, clusters, or full chip levels for ASIC.
  • Preferred experience with post-silicon lab bring-up.
  • Preferred skills include Linux, C/C++, Python, Perl, Networking, and Formal verification.

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