Senior Staff Engineer, Design Verification

Samsung Semiconductor

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $189,000–$301,000 / yr
Posted: 171 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $193k

This role $245k

$125k most similar roles pay here $320k

This role pays more than 88% of similar roles. Most pay $170,000–$216,587 — the shaded band above. At the midpoint, this role pays about $245k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 49 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 49 roles with salary data.

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At a glance

TL;DR · Senior Staff Engineer, Design Verification

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Senior Staff Engineer, Design Verification joins the AGI Computing Lab to address complex system-level challenges for AI/ML workloads. This role involves developing verification infrastructure and automation environments for build, simulation, regression, and triages while leading the verification of IP blocks for an AI accelerator in collaboration with architects and RTL engineers. The candidate will create direct or random testbenches, define verification scopes and test plans for functional and performance validation, and provide comprehensive documentation of verification strategies. Key technical requirements include expertise in SoC or IP verification using UVM, SystemVerilog, C/C++, and scripting languages like Perl or Python. Experience with RTL, computational logic, interconnect networks, memory systems, and FPGA or emulation platforms is essential to solve problems regarding the scalability and performance of high-demand AI/ML computing environments.

What does a Engineer earn in California?

Median $208000 from 94 postings across 22 companies.

See salary data

Skills

UVM System Verilog C++ Python Perl RTL SoC FPGA Emulation AI Accelerators Computer Architecture Interconnect Networks Simulation

What you'll do

Develop verification infrastructure and automation environments for build, simulation, regression, and triages.
Lead the verification of IP blocks for an AI accelerator in collaboration with architects and RTL engineers.
Create direct or random testbenches and define verification scopes for functional and performance validation.
Establish and close verification quality metrics to ensure high-quality results.
Provide comprehensive documentation of verification strategies and maintain user-friendly test environments.
Mentor junior engineers as needed to support team growth and development.
Debug failures cross-functionally with design, compiler, and simulation engineers.

What we're looking for

Bachelor’s degree with 15+ years, Master’s with 13+ years, or PhD with 10+ years of industry experience.
Strong background in SoC or IP verification and testbench development using UVM, SystemVerilog, C/C++, and scripting languages like Perl or Python.
Experience verifying logic from scratch across multiple levels including complex IP blocks, dies, SoCs, and full systems.
Proficiency in RTL and strong debugging skills.
Knowledge of microarchitecture and computer architecture, preferably in the area of AI accelerators.
Desired experience with computational logic, interconnect networks, or memory systems.
Preferred knowledge of FPGA and emulation platforms.
Strong analytical, problem-solving, communication, and interpersonal skills.

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