3rd Party Memory PHY Technical Lead

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$144,800–$217,200 / yr
Posted
25 days ago
Freshness
Confirmed live yesterday
Closes
Sep 16, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $216k
This role $181k
$131k $277k
below market most similar roles pay here above market

This role pays less than 76% of similar roles. Most pay $182,000–$250,000 — the blue band above. At the midpoint, this role pays about $181k versus about $216k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 510 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 510 roles with salary data.

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At a glance

TL;DR · 3rd Party Memory PHY Technical Lead

Role Posting Log in to save

The 3rd Party Memory PHY Technical Lead joins a team of high-speed physical interface and mixed-signal IP experts. This role serves as the technical owner for third-party Memory/Serdes PHY and mixed-signal IP across multiple product programs. Responsibilities include providing technical leadership from architecture through post-silicon validation, collaborating with vendors on IP evaluation, and partnering with SoC integration teams to ensure electrical and logical quality. The role involves driving architectural decisions balancing performance, power, area, and cost while interpreting industry standards. Key technical requirements include experience with high-speed I/O SerDes, Memory PHY architectures, and mixed-signal blocks like CTLE, FFE, DFE, and PLL/DLL. Candidates should understand advanced FinFET technologies, RTL, and logic design, with familiarity in Python, Perl, and UNIX environments.

Skills

Mixed-Signal IP SerDes Memory PHY SoC Integration Post-Silicon Validation Signal Integrity Power Integrity FinFET RTL Python Perl UNIX HBM LPDDR DDR GDDR PCIe Ethernet USB DisplayPort HDMI MIPI ATE BERT Oscilloscope Logic Analyzer

What you'll do

  • Serve as the technical owner for third-party Memory/Serdes PHY and mixed-signal IP across multiple product programs.
  • Provide technical leadership for IP/PHY throughout the lifecycle from architecture and integration to post-silicon validation and production.
  • Coordinate with third-party vendors to manage IP evaluation, design transfer, and integration into AMD SoCs.
  • Partner with SoC integration teams to ensure the electrical, logical, and physical quality of IP integration.
  • Drive system-level architectural decisions by balancing performance, power, area, cost, and implementation constraints.
  • Translate industry standards and customer requirements into silicon, package, PCB, and validation specifications.
  • Support package and PCB design teams with signal integrity and power integrity analysis, debug, and optimization.
  • Direct first-silicon bring-up, debug, characterization, compliance testing, and customer issue resolution with post-silicon validation teams.

What we're looking for

  • Provide technical leadership for third-party Memory/Serdes PHY and mixed-signal IP throughout the product lifecycle.
  • Collaborate with IP vendors and SoC integration teams to ensure electrical, logical, and physical quality of IP integration.
  • Drive system-level architectural decisions balancing performance, power, area, cost, and implementation constraints.
  • Support package and PCB design teams with signal integrity and power integrity analysis, debug, and optimization.
  • Partner with post-silicon validation teams for first-silicon bring-up, debug, characterization, and compliance testing.
  • Experience designing high-speed mixed-signal IP with system-level architecture experience (preferred).
  • Design knowledge of high-speed I/O SerDes or Memory PHY architectures and blocks (preferred).
  • B.S. or M.S. in Electrical Engineering (preferred).

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