Firmware Memory Engineer

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TXBoxborough, MA
Salary
$178,400–$267,600 / yr
Posted
116 days ago
Freshness
Confirmed live yesterday
Closes
Jun 17, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $223k
$138k $281k
below market most similar roles pay here above market

This role pays more than 76% of similar roles. Most pay $161,425–$222,000 — the blue band above. At the midpoint, this role pays about $223k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 510 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 510 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Firmware Memory Engineer

The Firmware Memory Engineer joins the Memory IO team to support the pre-silicon and post-silicon development of high-speed LPDDR, DDR, and inter-chip IO IPs. This role involves the definition, design, and productization of Memory PHYs and interface IP, specifically focusing on microarchitecture, firmware/hardware co-design, and algorithm design. Key responsibilities include firmware design for DDR PHY and DRAM training steps, ATE testing, and SoC power. The engineer will perform pre-silicon coding against architectural models and conduct post-silicon lab bring-up and optimization. Required skills include proficiency in C, C++, and Python, along with knowledge of Verilog, SystemVerilog, and digital simulation. Candidates must understand computer architecture, synchronization techniques, and hardware clocking while utilizing laboratory equipment like oscilloscopes and logic analyzers.

What you'll do

  • Design and develop firmware for DDR PHY and DRAM training steps.
  • Develop firmware for DDR PHY to support ATE testing, IP characterization, and SoC power.
  • Write pre-silicon firmware code and perform simulations against architectural and RTL models.
  • Execute post-silicon lab bring-up and optimize DDR initialization and run-time firmware.
  • Enhance post-silicon DDR training to improve link reliability and frequency margins.
  • Define features and specifications in coordination with SoC and product firmware teams.

What we're looking for

  • Experience in firmware design and development for DDR PHY and DRAM training steps.
  • Experience in pre-silicon firmware coding and simulation against architectural and RTL models.
  • Experience in post-silicon lab bring-up and optimization of DDR init and run-time firmware.
  • Post-silicon experience developing firmware on real hardware.
  • Excellent knowledge of C, C++, and scripting languages like Python (preferred).
  • Good knowledge of Verilog/SystemVerilog and digital simulation debug (preferred).
  • Strong understanding of computer organization/architecture (preferred).
  • Bachelor's degree in Electrical or Computer Engineering (strongly desired).

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