High Speed IO Analog Mixed Signal Design Engineer

What you'll do

• Design and develop high-speed IO, SerDes, and memory interface PHY IP solutions.
• Translate system-level specifications into detailed analog mixed-signal (AMS) block and circuit specifications.
• Author technical specifications for AMS blocks, pre-silicon verification, and post-silicon characterization plans.
• Design and architect specific circuits including PLLs, DLLs, LDO regulators, and clock distribution networks.
• Perform link budget analysis and evaluate jitter, SNR metrics, and power/area/performance trade-offs.
• Execute low-power design techniques for high-speed digital circuits using advanced FinFET CMOS process nodes.
• Utilize Cadence Virtuoso and Spectre tools to perform circuit simulations and schematic captures.
• Manage the full lifecycle of AMS designs from initial architecture through successful production.

What we're looking for

• MS or PhD in Electrical Engineering, Computer Engineering, or a related field.
• Experience in high-speed IO/SerDes AMS circuit architecture and design.
• Ability to translate system-level specifications into AMS block and circuit-level specifications.
• Proficiency in authoring technical specifications for AMS blocks, pre-silicon verification, and post-silicon characterization.
• Hands-on experience with multi-Gbps serial, parallel high-bandwidth memory interfaces, and chip-to-chip links (preferred).
• Strong knowledge of mixed-signal circuit architecture including PLL/DLL, clocking, mismatch mitigation, and low-power techniques (preferred).
• Experience in FinFET advanced CMOS process nodes such as 16nm, 7nm, or 3nm (preferred).
• Proficiency in AMS design flows and tools like Cadence Virtuoso, Spectre, or HSPICE (preferred).