Third-Party SerDes PHY Technical Lead

What you'll do

• Serve as the technical owner for third-party SERDES IPs, providing pre-silicon and post-silicon leadership.
• Coordinate with third-party vendors to manage design transfers, release collateral, and integrate IP across products.
• Partner with integration teams to ensure electrical, logical, and physical quality during the integration process.
• Support package and PCB design teams with signal integrity and power integrity analyses.
• Perform technical evaluations of new IP for potential licensing.
• Provide post-silicon support including first silicon bring-up, debug, production testing, and lab validation.
• Provide feedback and recommendations for future SERDES IP designs based on post-silicon learnings.

What we're looking for

• Expertise in third-party SERDES IP integration and support for interfaces like PCIe, USB, DisplayPort/HDMI, MIPI, Ethernet, and UCIe.
• Ability to provide pre-silicon and post-silicon technical leadership for third-party SERDES IPs.
• Experience with semiconductor engineering focusing on analog/mixed-signal circuit or system design, analysis, validation, testing, characterization, or debug (preferred).
• Knowledge of high-speed I/O SERDES architectures and related circuit blocks like CTLE, FFE, DFE, VGA, CDR, and PLL/DLL (preferred).
• Familiarity with advanced FinFET semiconductor process technologies (preferred).
• Understanding of RTL design, logic design, and digital circuits (preferred).
• Experience with scripting/automation using Python or Perl and familiarity with UNIX or Linux environments (preferred).
• Bachelor's or master’s degree in electrical engineering or a related engineering discipline (preferred).