Wireless SOC Verification Engineer

Apple Inc

Confirmed live yesterday Low trust

Quick summary

Work type: On-site
Location: Sunnyvale, CA
Salary: $129,300–$225,300 / yr
Posted: 91 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k

This role $177k

$118k most similar roles pay here $237k

This role pays more than 55% of similar roles. Most pay $168,500–$214,000 — the shaded band above. At the midpoint, this role pays about $177k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · Wireless SOC Verification Engineer

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As a Wireless SOC Verification Engineer, you will join the Wireless SOC team to verify complex systems at the heart of mobile networking. You will be responsible for pre-silicon RTL verification of block and top-level SOCs, focusing on high-speed layered protocols, low-power architectures, and multi-chip debug. Your daily work involves creating coverage-driven verification plans from specifications, architecting highly reusable UVM testbenches, and integrating complex multi-instance VIPs and sub-system test suites. You will also perform power management designs using UPF simulations and collaborate with cross-functional teams to ensure tape-out readiness. The role requires proficiency in SystemVerilog, Verilog, and UVM methodology, with preferred experience in Formal Verification and low-power verification. This position addresses the technical challenges of wireless protocol chip requirements, including PCIe, memory controllers, and secure boot schemes within a high-efficiency architecture.

Skills

SystemVerilog UVM Verilog RTL Verification Formal Verification UPF PCIe DDR USB SOC Coverage Driven Verification Multi-processor Systems Memory Controller Subsystems

What you'll do

Perform pre-silicon RTL verification of block and top-level SOC designs.
Architect highly reusable UVM-based testbenches and integrate complex multi-instance VIPs.
Create coverage-driven verification plans from specifications to meet defined coverage targets.
Execute power management simulations using low-power methodologies and UPF scenarios.
Verify high-speed layered protocols, memory controllers, and peripheral subsystems like PCIe and USB.
Collaborate with design, architecture, and firmware teams to integrate and verify overall SOC designs.
Work with methodology architects to improve verification metrics and tape-out readiness.

What we're looking for

Must have a bachelor's degree.
Experience with SystemVerilog, Verilog, or UVM is required.
Strong problem solving and analytical skills are required.
Expertise in SystemVerilog coding and UVM methodology is preferred.
Hands-on ASIC and SOC Design Verification experience is preferred.
Experience with Formal Verification is preferred.
Low Power Verification experience is preferred.

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