Wireless SOC Verification Engineer

Apple Inc

Confirmed live today Low trust

Quick summary

Work type: On-site
Location: Irvine, CA
Salary: $122,700–$214,300 / yr
Posted: 137 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k

This role $168k

$108k $256k

below market most similar roles pay here above market

This role pays less than 72% of similar roles. Most pay $168,500–$241,750 — the blue band above. At the midpoint, this role pays about $168k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Wireless SOC Verification Engineer

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JOB TITLE: Wireless SOC Verification Engineer As a Wireless SOC Verification Engineer within the Wireless SOC team, you will perform pre-silicon RTL verification for block and top-level SOC designs. Your daily responsibilities include architecting highly reusable UVM testbenches, integrating complex multi-instance VIPs, and creating coverage-driven verification plans from specifications. You will work to achieve coverage targets for high-speed layered protocols and low-power driven architectures, including power management designs using UPF simulations. The role requires proficiency in SystemVerilog, Verilog, and UVM methodologies, along with experience in Formal Verification and low-power verification. You will solve complex technical problems involving multi-chip SOC debug architectures, FW-HW interactions, and standard peripherals like PCIe, CPUs, DMA, and memory controllers to ensure tape-out readiness for advanced wireless systems.

Skills

SystemVerilog UVM Verilog ASIC SOC Formal Verification UPF RTL PCIe DDR USB DMA Power Management Low Power Verification Coverage Driven Verification FW-HW Interaction Wireless Protocols

What you'll do

Perform pre-silicon RTL verification for block and top-level SOC designs.
Architect highly reusable UVM-based testbenches and integrate complex multi-instance VIPs.
Create and refine coverage-driven verification plans based on technical specifications.
Deliver power management designs using low-power methodologies and UPF simulations.
Implement effective coverage-driven and directed test cases to meet quality targets.
Integrate and verify overall SOC designs with design, architecture, SW, and FW teams.
Improve verification metrics by working closely with DV methodology architects.

What we're looking for

Bachelor's degree is required.
Experience with SystemVerilog, Verilog, or UVM is required.
Strong problem solving and analytical skills are required.
Expertise in SystemVerilog coding and UVM methodology (preferred).
Dedicated or hands-on ASIC and SOC DV experience (preferred).
Experience with Formal Verification (preferred).
Low Power Verification experience (preferred).

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