Wireless Design Verification Engineer

Apple Inc

Confirmed live yesterday Low trust

Quick summary

Work type: On-site
Location: Sunnyvale, CA
Salary: $129,300–$225,300 / yr
Posted: 144 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k

This role $177k

$118k most similar roles pay here $237k

This role pays more than 54% of similar roles. Most pay $167,925–$214,000 — the shaded band above. At the midpoint, this role pays about $177k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · Wireless Design Verification Engineer

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As a Wireless Design Verification Engineer on the Wireless Connectivity team, you will ensure first-time-right silicon success for state-of-the-art WiFi SoCs. You will be responsible for verifying controllers, datapaths, subsystems, protocols, low power capabilities, and SOC integration frameworks. Your daily work involves owning verification from test planning and environment bring-up through feature closure by developing comprehensive UVM testbench environments and BFMs across block to system levels. You will implement constrained random scenarios, track regression metrics, resolve issues, and address coverage gaps while enhancing simulation infrastructure automations. The role requires expertise in ASIC verification, RTL simulation workflows, and functional coverage analysis. Preferred skills include experience with assertion-based verification, DPI-based approaches, Power-Aware/UPF simulations, and proficiency in Python, Perl, or Bash scripting to solve complex technical challenges within the multi-gigabit wireless technology domain.

Skills

UVM ASIC Verification RTL Simulation Python Perl Bash Functional Coverage DPI UPF

What you'll do

Own the full verification lifecycle from initial test planning and environment bring-up through final feature closure.
Develop comprehensive UVM testbench environments and BFMs spanning block to system levels.
Implement constrained random scenarios to exercise complex protocol, control, and datapath functionality.
Drive project closure by tracking regression metrics, resolving bugs, and addressing coverage gaps.
Define verification strategies for wireless features in collaboration with cross-functional systems and design teams.
Enhance simulation infrastructure through the development of automated tools and scripts.

What we're looking for

A bachelor's degree is required.
Experience with ASIC verification or complex digital IP development is required.
Experience developing testbench environments, components, and scenarios in simulation is required.
Knowledge of constrained random testing, functional coverage analysis, and RTL simulation workflows is required.
Proficiency in Python, Perl, or Bash scripting for automation is preferred.
Experience with bus functional models, transaction modeling, and assertions is preferred.
Exposure to system-level modeling or DPI-based verification approaches is preferred.
Experience with Power-Aware or UPF simulations is preferred.

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