Wireless SOC Verification Engineer

Apple Inc

Confirmed live today Low trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $122,700–$214,300 / yr
Posted: 137 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k

This role $168k

$108k $256k

below market most similar roles pay here above market

This role pays less than 72% of similar roles. Most pay $168,500–$241,750 — the blue band above. At the midpoint, this role pays about $168k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Wireless SOC Verification Engineer

Role Posting Log in to save

As a Wireless SOC Verification Engineer within the Wireless SOC team, you will perform pre-silicon RTL verification for block and top-level SOC designs. Your daily responsibilities include architecting highly reusable UVM testbenches, creating coverage-driven verification plans from specifications, and integrating complex multi-instance VIPs and sub-system test suites. You will work on high-speed layered protocols, low-power driven architectures, and multi-chip SOC debug architectures. Key technical requirements include proficiency in SystemVerilog, Verilog, and UVM methodology, along with experience in Formal Verification and low-power verification using UPF simulations. You will solve complex wireless protocol chip requirements by verifying standard SOC peripherals such as PCIe, CPUs, DMA, DDR, and memory controller subsystems to ensure tape-out readiness for new wireless and Bluetooth chips.

Skills

SystemVerilog UVM Verilog ASIC SOC Formal Verification UPF RTL Verification PCIe DDR DMA USB Power Management Low Power Verification Coverage Driven Verification FW-HW Interaction

What you'll do

Perform pre-silicon RTL verification for block and top-level SOC designs.
Architect highly reusable UVM-based testbenches and integrate complex multi-instance VIPs.
Create and refine coverage-driven verification plans based on technical specifications.
Deliver power management designs using low-power methodologies and UPF simulations.
Implement effective coverage-driven and directed test cases to meet quality targets.
Integrate and verify overall SOC designs with design, architecture, and firmware teams.
Work with DV methodology architects to improve and refine verification metrics.

What we're looking for

Bachelor’s degree is required.
Experience with SystemVerilog, Verilog, or UVM is required.
Strong problem solving and analytical skills are required.
Expertise in SystemVerilog coding and UVM methodology (preferred).
Dedicated/hands-on ASIC & SOC DV experience (preferred).
Experience with Formal Verification (preferred).
Low Power Verification experience (preferred).

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