Wireless Design Verification Engineer

Apple Inc

Confirmed live 2 days ago Low trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $122,700–$214,300 / yr
Posted: 144 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k

This role $168k

$110k most similar roles pay here $237k

This role pays less than 66% of similar roles. Most pay $167,925–$214,000 — the shaded band above. At the midpoint, this role pays about $168k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · Wireless Design Verification Engineer

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As a Wireless Design Verification Engineer, you will join the Wireless Connectivity team to ensure first-time-right silicon success for multi-gigabit wireless technology and WiFi SoCs. You will be responsible for the entire verification lifecycle, including test planning, environment bring-up, and feature closure for controllers, datapaths, subsystems, protocols, low power capabilities, and SOC integration frameworks. Your daily work involves developing comprehensive UVM testbench environments and BFMs across block to system levels while implementing constrained random scenarios to exercise complex functionality. You will also track regression metrics, resolve issues, address coverage gaps, and enhance simulation infrastructure automations. Required skills include experience with ASIC verification, RTL simulation workflows, and functional coverage analysis. Preferred technical proficiencies include Python, Perl, or Bash scripting, assertion-based verification, DPI-based approaches, and Power-Aware or UPF simulations.

Skills

UVM ASIC Verification RTL Simulation Python Perl Bash Functional Coverage DPI UPF

What you'll do

Own the entire verification lifecycle from initial test planning and environment bring-up to final feature closure.
Develop comprehensive UVM testbench environments and BFMs spanning block to system levels.
Implement constrained random scenarios to exercise complex protocol, control, and datapath functionality.
Drive project closure by tracking regression metrics, resolving bugs, and addressing coverage gaps.
Define verification strategies for wireless features in collaboration with cross-functional Systems and Design teams.
Enhance simulation infrastructure through the development of automation scripts.

What we're looking for

A bachelor's degree is required.
Experience with ASIC verification or complex digital IP development is required.
Experience developing testbench environments, components, and scenarios in simulation is required.
Knowledge of constrained random testing, functional coverage analysis, and RTL simulation workflows is required.
Experience with bus functional models, transaction modeling, and assertions is preferred.
Exposure to system-level modeling or DPI-based verification approaches is preferred.
Proficiency in Python, Perl, or Bash scripting for automation is preferred.
Experience with Power-Aware or UPF simulations is preferred.

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